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/Documentation/devicetree/bindings/display/tegra/
Dnvidia,tegra20-dc.yaml4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-dc.yaml#
15 pattern: "^dc@[0-9a-f]+$"
20 - nvidia,tegra20-dc
21 - nvidia,tegra30-dc
22 - nvidia,tegra114-dc
23 - nvidia,tegra124-dc
24 - nvidia,tegra210-dc
27 - const: nvidia,tegra124-dc
28 - const: nvidia,tegra132-dc
45 - const: dc
[all …]
Dnvidia,tegra186-display.yaml150 compatible = "nvidia,tegra186-dc";
154 clock-names = "dc";
156 reset-names = "dc";
169 compatible = "nvidia,tegra186-dc";
173 clock-names = "dc";
175 reset-names = "dc";
188 compatible = "nvidia,tegra186-dc";
192 clock-names = "dc";
194 reset-names = "dc";
238 compatible = "nvidia,tegra194-dc";
[all …]
Dnvidia,tegra186-dc.yaml4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra186-dc.yaml#
19 - nvidia,tegra186-dc
20 - nvidia,tegra194-dc
34 - const: dc
42 - const: dc
/Documentation/devicetree/bindings/iio/dac/
Dadi,ad5758.yaml21 adi,dc-dc-mode:
25 Mode of operation of the dc-to-dc converter
84 adi,dc-dc-ilim-microamp:
87 The dc-to-dc converter current limit.
99 - adi,dc-dc-mode
105 adi,dc-dc-mode:
134 adi,dc-dc-mode = <2>;
136 adi,dc-dc-ilim-microamp = <200000>;
Dadi,ad5755.yaml28 adi,ext-dc-dc-compenstation-resistor:
34 adi,dc-dc-phase:
38 Valid values for DC DC Phase control is:
39 0: All dc-to-dc converters clock on the same edge.
47 adi,dc-dc-freq-hz:
50 adi,dc-dc-max-microvolt:
52 Maximum allowed Vboost voltage supplied by the dc-to-dc converter.
140 adi,dc-dc-phase = <0>;
141 adi,dc-dc-freq-hz = <410000>;
142 adi,dc-dc-max-microvolt = <23000000>;
/Documentation/gpu/amdgpu/display/
Ddcn-blocks.rst11 .. kernel-doc:: drivers/gpu/drm/amd/display/dc/inc/hw/dchubbub.h
17 .. kernel-doc:: drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h
23 .. kernel-doc:: drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h
26 .. kernel-doc:: drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h
32 .. kernel-doc:: drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h
35 .. kernel-doc:: drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h
42 .. kernel-doc:: drivers/gpu/drm/amd/display/dc/inc/hw/opp.h
45 .. kernel-doc:: drivers/gpu/drm/amd/display/dc/inc/hw/opp.h
51 .. kernel-doc:: drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c
54 .. kernel-doc:: drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c
Dindex.rst4 drm/amd/display - Display Core (DC)
10 #. **Display Core (DC)** contains the OS-agnostic components. Things like
17 DC Code validation
22 DC case, we maintain a tree to centralize code from different parts. The shared
29 the prefix **DC Patches for <DATE>**, which is created based on the latest
31 those patches are under a DC version tested as follows:
74 DC Information
94 dc-debug.rst
96 dc-glossary.rst
Ddisplay-manager.rst54 DC Color Capabilities between DCN generations
59 gamma LUT sizes. AMD DC programs some of the color correction features
62 In general, the DRM CRTC color properties are programmed to DC, as follows:
68 .. kernel-doc:: drivers/gpu/drm/amd/display/dc/dc.h
71 .. kernel-doc:: drivers/gpu/drm/amd/display/dc/dc.h
93 to understand how this property is mapped to AMD DC interface. See more about
134 .. kernel-doc:: drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h
146 .. kernel-doc:: drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h
169 The alpha blending equation is configured from DRM to DC interface by the
176 OS-agnostic component (DC).
[all …]
/Documentation/devicetree/bindings/display/bridge/
Dfsl,imx8qxp-pixel-link.yaml27 - fsl,imx8qm-dc-pixel-link
28 - fsl,imx8qxp-dc-pixel-link
30 fsl,dc-id:
36 fsl,dc-stream-id:
68 const: fsl,imx8qxp-dc-pixel-link
71 fsl,dc-id:
78 const: fsl,imx8qm-dc-pixel-link
81 fsl,dc-id:
86 - fsl,dc-id
87 - fsl,dc-stream-id
[all …]
/Documentation/devicetree/bindings/sound/
Dcs43130.txt28 - cirrus,dc-measure:
29 Boolean, define to enable headphone DC impedance measurement.
33 DC impedance must also be enabled for AC impedance measurement.
35 - cirrus,dc-threshold:
36 Define 2 DC impedance thresholds in ohms for HP output control.
41 Only used if "cirrus,dc-measure" is defined.
63 cirrus,dc-measure;
65 cirrus,dc-threshold = /bits/ 16 <20 100>;
/Documentation/ABI/testing/
Dsysfs-driver-qat31 * dc: the device is configured for running compression services
32 * dcc: identical to dc but enables the dc chaining feature,
33 hash then compression. If this is not required chose dc
38 * asym;dc: the device is configured for running asymmetric
40 * dc;asym: identical to asym;dc
41 * sym;dc: the device is configured for running symmetric crypto
43 * dc;sym: identical to sym;dc
57 # echo dc > /sys/bus/pci/devices/<BDF>/qat/cfg_services
60 dc
117 * dc: the ring pair is configured for running compression services
Dsysfs-devices-platform-ACPI-TAD12 BIT(1): DC wakeup implemented if set
18 BIT(7): The DC timer wakes up from S4 if set
19 BIT(8): The DC timer wakes up from S5 if set
50 wakeups if the system is on DC power.
55 wakeups if the system is on DC power, respectively.
89 (RW,optional) The DC alarm timer value.
92 DC timer.
100 (RW,optional) The DC alarm expired timer wake policy.
103 DC timer.
112 (RW,optional) The DC alarm status.
[all …]
Ddebugfs-driver-qat_telemetry213 the PF 0000:6b:0.0 configured for `dc`:
218 0000:6b:0.1 RP 0 dc RP 1 dc RP 2 dc RP 3 dc
219 0000:6b:0.2 RP 4 dc RP 5 dc RP 6 dc RP 7 dc
220 0000:6b:0.3 RP 8 dc RP 9 dc RP10 dc RP11 dc
/Documentation/devicetree/bindings/regulator/
Dmaxim,max20411.yaml7 title: Maxim Integrated MAX20411 Step-Down DC-DC Converter
13 The MAX20411 is a high-efficiency, DC-DC step-down converter. It provides
/Documentation/driver-api/tty/
Dn_gsm.rst50 struct gsm_dlci_config dc;
88 dc.channel = 1;
89 ioctl(fd, GSMIOC_GETCONF_DLCI, &dc);
91 dc.priority = 1;
93 ioctl(fd, GSMIOC_SETCONF_DLCI, &dc);
147 struct gsm_dlci_config dc;
178 dc.channel = 1;
179 ioctl(fd, GSMIOC_GETCONF_DLCI, &dc);
181 dc.priority = 1;
183 ioctl(fd, GSMIOC_SETCONF_DLCI, &dc);
/Documentation/devicetree/bindings/interconnect/
Dqcom,rpmh.yaml32 - qcom,sc7180-dc-noc
44 - qcom,sc8180x-dc-noc
53 - qcom,sdm670-dc-noc
61 - qcom,sdm845-dc-noc
77 - qcom,sm8150-dc-noc
86 - qcom,sm8250-dc-noc
96 - qcom,sm8350-dc-noc
/Documentation/devicetree/bindings/power/supply/
Dqcom,pm8941-charger.yaml30 - description: DC-in valid
41 - const: dc-valid
100 qcom,dc-current-limit:
105 Default DC charge current limit in uA. Defaults to 100mA.
107 qcom,disable-dc:
109 description: Disable DC charger
171 "dc-valid";
173 qcom,dc-current-limit = <1000000>;
/Documentation/devicetree/bindings/display/panel/
Dilitek,ili9341.yaml34 dc-gpios:
59 - dc-gpios
83 dc-gpios = <&gpiod 13 0>;
94 dc-gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
Dilitek,ili9163.yaml33 dc-gpios:
44 - dc-gpios
61 dc-gpios = <&gpio0 24 GPIO_ACTIVE_HIGH>;
/Documentation/devicetree/bindings/display/
Dilitek,ili9486.yaml32 dc-gpios:
44 - dc-gpios
62 dc-gpios = <&gpio0 24 GPIO_ACTIVE_HIGH>;
Dsitronix,st7735r.yaml36 dc-gpios:
49 - dc-gpios
65 dc-gpios = <&gpio 43 GPIO_ACTIVE_HIGH>;
/Documentation/devicetree/bindings/phy/
Drealtek,usb2phy.yaml89 - const: usb-dc-cal
90 - const: usb-dc-dis
93 usb-dc-cal is the driving level for each phy specified via efuse.
94 usb-dc-dis is the disconnection level for each phy specified via efuse.
170 nvmem-cell-names = "usb-dc-cal", "usb-dc-dis";
/Documentation/hwmon/
Dpxe1610.rst39 - Intel VR13 DC-DC converter specifications.
48 - Intel VR13 DC-DC converter specifications.
Dw83l786ng.rst50 - this file stores PWM duty cycle or DC value (fan speed) in range:
61 - Select PWM of DC mode
63 * 0 DC
/Documentation/userspace-api/media/dvb/
Dfe-set-voltage.rst13 FE_SET_VOLTAGE - Allow setting the DC level sent to the antenna subsystem.
34 This ioctl allows to set the DC voltage level sent through the antenna
38 device to send a DC voltage to feed power to the LNBf. Depending on the

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