Searched +full:delay +full:- +full:line (Results 1 – 25 of 113) sorted by relevance
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| /Documentation/devicetree/bindings/power/reset/ |
| D | gpio-restart.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/reset/gpio-restart.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sebastian Reichel <sre@kernel.org>
13 Drive a GPIO line that can be used to restart the system from a restart handler.
16 request the given gpio line and install a restart handler. If the optional properties
17 'open-source' is not found, the GPIO line will be driven in the inactive state. Otherwise its
22 This will also cause an inactive->active edge condition, triggering positive edge triggered
23 reset. After a delay specified by active-delay, the GPIO is set to inactive, thus causing an
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| D | gpio-poweroff.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/reset/gpio-poweroff.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sebastian Reichel <sre@kernel.org>
13 System power off support via a GPIO line. When a shutdown is
15 from inactive to active. After a delay (active-delay-ms) it
17 delay (inactive-delay-ms) it is configured as active again.
19 the system is still running after waiting some time (timeout-ms).
22 - $ref: restart-handler.yaml#
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| D | ltc2952-poweroff.txt | 9 - compatible: Must contain: "lltc,ltc2952"
10 - watchdog-gpios: phandle + gpio-specifier for the GPIO connected to the
11 chip's watchdog line
12 - kill-gpios: phandle + gpio-specifier for the GPIO connected to the
13 chip's kill line
16 - trigger-gpios: phandle + gpio-specifier for the GPIO connected to the
17 chip's trigger line. If this property is not set, the
20 - trigger-delay-ms The number of milliseconds to wait after trigger line
29 trigger-gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
30 trigger-delay-ms = <2000>;
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| /Documentation/devicetree/bindings/mmc/ |
| D | sprd,sdhci-r11.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mmc/sprd,sdhci-r11.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Orson Zhai <orsonzhai@gmail.com>
11 - Baolin Wang <baolin.wang7@gmail.com>
12 - Chunyan Zhang <zhang.lyra@gmail.com>
16 const: sprd,sdhci-r11
27 - description: SDIO source clock
28 - description: gate clock for enabling/disabling the device
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| D | fsl-imx-esdhc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/fsl-imx-esdhc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
13 - $ref: sdhci-common.yaml#
20 by mmc.txt and the properties used by the sdhci-esdhc-imx driver.
25 - enum:
26 - fsl,imx25-esdhc
27 - fsl,imx35-esdhc
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| D | mmc-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ulf Hansson <ulf.hansson@linaro.org>
25 "#address-cells":
30 "#size-cells":
37 broken-cd:
42 cd-gpios:
47 non-removable:
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| D | sdhci-am654.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: http://devicetree.org/schemas/mmc/sdhci-am654.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Ulf Hansson <ulf.hansson@linaro.org>
14 - $ref: sdhci-common.yaml#
19 - enum:
20 - ti,am62-sdhci
21 - ti,am64-sdhci-4bit
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| /Documentation/devicetree/bindings/mtd/ |
| D | orion-nand.txt | 4 - compatible : "marvell,orion-nand".
5 - reg : Base physical address of the NAND and length of memory mapped
9 - cle : Address line number connected to CLE. Default is 0
10 - ale : Address line number connected to ALE. Default is 1
11 - bank-width : Width in bytes of the device. Default is 1
12 - chip-delay : Chip dependent delay for transferring data from array to read
15 The device tree may optionally contain sub-nodes describing partitions of the
21 #address-cells = <1>;
22 #size-cells = <1>;
25 bank-width = <1>;
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| D | fsl-upm-nand.txt | 4 - compatible : "fsl,upm-nand".
5 - reg : should specify localbus chip select and size used for the chip.
6 - fsl,upm-addr-offset : UPM pattern offset for the address latch.
7 - fsl,upm-cmd-offset : UPM pattern offset for the command latch.
10 - fsl,upm-addr-line-cs-offsets : address offsets for multi-chip support.
12 - gpios : may specify optional GPIOs connected to the Ready-Not-Busy pins
13 (R/B#). For multi-chip devices, "n" GPIO definitions are required
17 - fsl,upm-wait-flags : add chip-dependent short delays after running the
20 - chip-delay : chip dependent delay for transferring data from array to
24 Each flash chip described may optionally contain additional sub-nodes
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| /Documentation/devicetree/bindings/serial/ |
| D | rs485.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
9 description: The RTS signal is capable of automatically controlling line
10 direction for the built-in half-duplex mode. The properties described
11 hereafter shall be given to a half-duplex capable UART node.
14 - Rob Herring <robh@kernel.org>
17 rs485-rts-delay:
18 description: prop-encoded-array <a b>
19 $ref: /schemas/types.yaml#/definitions/uint32-array
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| /Documentation/admin-guide/device-mapper/ |
| D | delay.rst | 2 dm-delay
5 Device-Mapper's "delay" target delays reads and/or writes
10 <device> <offset> <delay> [<write_device> <write_offset> <write_delay>
13 Table line has to either have 3, 6 or 9 arguments:
15 3: apply offset and delay to read, write and flush operations on device
17 6: apply offset and delay to device, also apply write_offset and write_delay
37 dmsetup create delayed --table "0 `blockdev --getsz $1` delay $1 0 500"
46 dmsetup create delayed --table "0 `blockdev --getsz $1` delay $1 2048 0 $2 4096 400"
54 dmsetup create delayed --table "0 `blockdev --getsz $1` delay $1 0 50 $2 0 100 $1 0 333"
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| D | dm-init.rst | 5 It is possible to configure a device-mapper device to act as the root device for
11 The second is to create one or more device-mappers using the module parameter
12 "dm-mod.create=" through the kernel boot command line argument.
15 semi-colons, where:
17 - a comma is used to separate fields like name, uuid, flags and table
19 - a semi-colon is used to separate devices.
23 …dm-mod.create=<name>,<uuid>,<minor>,<flags>,<table>[,<table>+][;<name>,<uuid>,<minor>,<flags>,<tab…
28 <uuid> ::= xxxxxxxx-xxxx-xxxx-xxxx-xxxxxxxxxxxx | ""
34 The dm line should be equivalent to the one used by the dmsetup tool with the
35 `--concise` argument.
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| /Documentation/devicetree/bindings/gpio/ |
| D | gpio-delay.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/gpio-delay.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: GPIO delay controller
10 - Alexander Stein <linux@ew.tq-group.com>
16 +----------+ +-----------+
23 | [IOx|-------| |--+-----|-----+ |
26 +----------+ --- C +-----------+
27 ---
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| /Documentation/devicetree/bindings/net/ |
| D | mdio.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Heiner Kallweit <hkallweit1@gmail.com>
17 bus. These should follow the generic ethernet-phy.yaml document, or
22 pattern: '^mdio(-(bus|external))?(@.+|-([0-9]+))?$'
24 "#address-cells":
27 "#size-cells":
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| /Documentation/devicetree/bindings/sound/ |
| D | microchip,sama7g5-pdmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/microchip,sama7g5-pdmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
17 - $ref: dai-common.yaml#
21 const: microchip,sama7g5-pdmc
26 "#sound-dai-cells":
34 - description: Peripheral Bus Clock
35 - description: Generic Clock
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| /Documentation/devicetree/bindings/input/touchscreen/ |
| D | ti,ads7843.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexander Stein <alexander.stein@ew.tq-group.com>
11 - Dmitry Torokhov <dmitry.torokhov@gmail.com>
12 - Marek Vasut <marex@denx.de>
21 - ti,ads7843
22 - ti,ads7845
23 - ti,ads7846
24 - ti,ads7873
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| D | ti,am3359-tsc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/input/touchscreen/ti,am3359-tsc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Miquel Raynal <miquel.raynal@bootlin.com>
14 const: ti,am3359-tsc
22 ti,x-plate-resistance:
26 ti,coordinate-readouts:
36 ti,wire-config:
38 wires on touchscreen. We need to provide an 8-bit number where the
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| /Documentation/devicetree/bindings/regulator/ |
| D | richtek,rtmv20-regulator.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/regulator/richtek,rtmv20-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - ChiYuan Huang <cy_huang@richtek.com>
27 wakeup-source: true
32 enable-gpios:
33 description: A connection of the 'enable' gpio line.
36 richtek,ld-pulse-delay-us:
38 load current pulse delay in microsecond after strobe pin pulse high.
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| /Documentation/devicetree/bindings/spi/ |
| D | samsung,spi-peripheral-props.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/samsung,spi-peripheral-props.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Peripheral-specific properties for Samsung S3C/S5P/Exynos SoC SPI controller
10 - Krzysztof Kozlowski <krzk@kernel.org>
13 See spi-peripheral-props.yaml for more info.
16 controller-data:
21 samsung,spi-feedback-delay:
23 The sampling phase shift to be applied on the miso line (to account
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| D | fsl,dspi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Li <Frank.Li@nxp.com>
15 - enum:
16 - fsl,vf610-dspi
17 - fsl,ls1021a-v1.0-dspi
18 - fsl,ls1012a-dspi
19 - fsl,ls1028a-dspi
20 - fsl,ls1043a-dspi
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| /Documentation/devicetree/bindings/net/dsa/ |
| D | microchip,lan937x.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - UNGLinuxDriver@microchip.com
13 - $ref: dsa.yaml#/$defs/ethernet-ports
18 - microchip,lan9370
19 - microchip,lan9371
20 - microchip,lan9372
21 - microchip,lan9373
22 - microchip,lan9374
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| D | realtek.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - $ref: dsa.yaml#/$defs/ethernet-ports
13 - Linus Walleij <linus.walleij@linaro.org>
20 The SMI "Simple Management Interface" is a two-wire protocol using
21 bit-banged GPIO that while it reuses the MDIO lines MCK and MDIO does
23 SMI-based Realtek devices. The realtek-smi driver is a platform driver
26 The MDIO-connected switches use MDIO protocol to access their registers.
27 The realtek-mdio driver is an MDIO driver and it must be inserted inside
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| /Documentation/scsi/ |
| D | aha152x.rst | 1 .. SPDX-License-Identifier: GPL-2.0
5 Adaptec AHA-1520/1522 SCSI driver for Linux (aha152x)
8 Copyright |copy| 1993-1999 Jürgen Fischer <fischer@norbit.de>
14 bottom-half handler complete()).
27 IRQ interrupt level (9-12; default 11)
28 SCSI_ID scsi id of controller (0-7; default 7)
32 DELAY: bus reset delay (default 100)
42 - DAUTOCONF
43 use configuration the controller reports (AHA-152x only)
45 - DSKIP_BIOSTEST
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| /Documentation/devicetree/bindings/i2c/ |
| D | i2c-gpio.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Wolfram Sang <wsa@kernel.org>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
18 - const: i2c-gpio
20 sda-gpios:
24 from <dt-bindings/gpio/gpio.h> since the signal is by definition
28 scl-gpios:
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | pinctrl-st.txt | 3 Each multi-function pin is controlled, driven and routed through the
5 and multiple alternate functions(ALT1 - ALTx) that directly connect
14 GPIO bank can have one of the two possible types of interrupt-wirings.
20 | |----> [gpio-bank (n) ]
21 | |----> [gpio-bank (n + 1)]
22 [irqN]-- | irq-mux |----> [gpio-bank (n + 2)]
23 | |----> [gpio-bank (... )]
24 |_________|----> [gpio-bank (n + 7)]
28 [irqN]----> [gpio-bank (n)]
33 - compatible : should be "st,stih407-<pio-block>-pinctrl"
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