Searched full:design (Results 1 – 25 of 384) sorted by relevance
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29 * - DiBcom NIM7090 reference design31 * - DiBcom NIM8096MD reference design33 * - DiBcom NIM9090MD reference design35 * - DiBcom STK7070P reference design37 * - DiBcom STK7070PD reference design39 * - DiBcom STK7700D reference design41 * - DiBcom STK7700P reference design43 * - DiBcom STK7770P reference design45 * - DiBcom STK807xP reference design47 * - DiBcom STK807xPVR reference design[all …]
11 lockdep-design14 mutex-design15 rt-mutex-design19 ww-mutex-design
64 - energy-full-design-microwatt-hours65 - charge-full-design-microamp-hours66 - voltage-min-design-microvolt67 Both or neither of the *-full-design-*-hours properties must be set.80 voltage-min-design-microvolt = <3200000>;81 energy-full-design-microwatt-hours = <5290000>;82 charge-full-design-microamp-hours = <1430000>;
54 voltage-min-design-microvolt:57 voltage-max-design-microvolt:60 energy-full-design-microwatt-hours:61 description: battery design energy63 charge-full-design-microamp-hours:64 description: battery design capacity152 voltage-min-design-microvolt = <3200000>;153 voltage-max-design-microvolt = <4200000>;154 energy-full-design-microwatt-hours = <5290000>;155 charge-full-design-microamp-hours = <1430000>;
35 - voltage-min-design-microvolt: drained battery voltage,36 - voltage-max-design-microvolt: fully charged battery voltage.52 voltage-min-design-microvolt = <3600000>;53 voltage-max-design-microvolt = <4200000>;
27 Design/Memory-Ordering/Tree-RCU-Memory-Ordering28 Design/Expedited-Grace-Periods/Expedited-Grace-Periods29 Design/Requirements/Requirements30 Design/Data-Structures/Data-Structures
17 mutex-design23 * lockdep-design26 * rt-mutex-design29 * ww-mutex-design
8 ftrace-design25 histogram-design31 ring-buffer-design
35 - Identifier of the board design38 - Revision of the board design41 - Vendor of the board design44 - Model name of the board design
58 - Part number identifying the board design61 - ASIC design identifier64 - ASIC design revision
57 Versions in this section identify the device design. For example,127 Unique identifier of the board design.132 Board design revision.137 ASIC design identifier.142 ASIC design revision/stepping.
2 Regulator API design notes6 of the design considerations which impact the regulator API design.
2 Device Driver Design Patterns5 This document describes a few common design patterns found in device drivers.7 conform to these design patterns.21 The most common way to achieve this is to use the state container design102 The design pattern is the same for an hrtimer or something similar that will
10 design-patterns
14 sched-design-CFS21 sched-nice-design
11 xfs-delayed-logging-design14 xfs-online-fsck-design
17 （该核心机制详见(Documentation/translations/zh_CN/mm/damon/design.rst)）31 design
24 sched-design-CFS29 sched-nice-design
17 - description: Alleycat5 (98DX25xx) Reference Design23 - description: Alleycat5X (98DX35xx) Reference Design
6 design issues before getting lost in the code details. This section is meant to9 * Each RFC should be a section in this file, explaining the goal and main design
17 Tap value varies based on platform design trace lengths from Tegra26 Tap value varies based on platform design trace lengths from Tegra
39 charge-full-design-microamp-hours = <3260000>;40 energy-full-design-microwatt-hours = <24000000>;
21 http://developer.intel.com/design/network/products/npfamily/ixp4xx.htm48 http://developer.intel.com/design/network/products/npfamily/ixp425.htm106 The ADI Coyote platform is reference design for those building122 http://www.intel.com/design/network/products/npfamily/ixdpg425.htm129 http://www.intel.com/design/network/products/npfamily/ixdp465.htm
20 instead it is a part of External Design Specification (EDS) for given21 Intel CPU. External Design Specifications are usually not publicly
8 sched-design-CFS