Searched +full:diff +full:- +full:channels (Results 1 – 13 of 13) sorted by relevance
| /Documentation/devicetree/bindings/iio/adc/ |
| D | adi,ad7124.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Stefan Popa <stefan.popa@analog.com> 16 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7124-8.pdf 21 - adi,ad7124-4 22 - adi,ad7124-8 32 clock-names: 34 - const: mclk 40 '#address-cells': [all …]
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| D | ti,ads1119.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - João Paulo Gonçalves <jpaulo.silvagoncalves@gmail.com> 13 The TI ADS1119 is a precision 16-bit ADC over I2C that offers single-ended and 28 reset-gpios: 31 avdd-supply: true 32 dvdd-supply: true 34 vref-supply: 38 "#address-cells": [all …]
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| D | adc.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: IIO Common Properties for ADC Channels 10 - Jonathan Cameron <jic23@kernel.org> 13 A few properties are defined in a common way ADC channels. 17 pattern: "^channel(@[0-9a-f]+)?$" 31 diff-channels: 32 $ref: /schemas/types.yaml#/definitions/uint32-array 41 single-channel: [all …]
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| D | adi,ad4130.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Cosmin Tanislav <cosmin.tanislav@analog.com> 15 https://www.analog.com/media/en/technical-documentation/data-sheets/AD4130-8.pdf 20 - adi,ad4130 29 clock-names: 31 - const: mclk 36 interrupt-names: 42 - int [all …]
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| D | adi,ad7173.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Ceclan Dumitru <dumitru.ceclan@analog.com> 15 The AD717x family offer a complete integrated Sigma-Delta ADC solution which 18 (Factory Automation PLC Input modules). The Sigma-Delta ADC is intended 23 The AD411X family encompasses a series of low power, low noise, 24-bit, 24 sigma-delta analog-to-digital converters that offer a versatile range of 26 fully differential/single-ended and bipolar voltage inputs. 29 https://www.analog.com/media/en/technical-documentation/data-sheets/AD4111.pdf [all …]
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| D | adi,ad7292.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Analog Devices AD7292 10-Bit Monitor and Control System 10 - Marcelo Schmitt <marcelo.schmitt1@gmail.com> 13 Analog Devices AD7292 10-Bit Monitor and Control System with ADC, DACs, 17 https://www.analog.com/media/en/technical-documentation/data-sheets/ad7292.pdf 22 - adi,ad7292 27 vref-supply: 31 spi-cpha: true [all …]
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| D | adi,max11410.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Ibrahim Tilki <Ibrahim.Tilki@analog.com> 21 - adi,max11410 30 interrupt-names: 34 - enum: [gpio0, gpio1] 35 - const: gpio1 37 '#address-cells': 40 '#size-cells': [all …]
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| D | microchip,mcp3564.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Marius Cristea <marius.cristea@microchip.com> 13 Bindings for the Microchip family of 153.6 ksps, Low-Noise 16/24-Bit 14 Delta-Sigma ADCs with an SPI interface. Datasheet can be found here: 16 …s/aemDocuments/documents/MSLD/ProductDocuments/DataSheets/MCP3561-2-4-Family-Data-Sheet-DS20006181… 18 …ds/aemDocuments/documents/APID/ProductDocuments/DataSheets/MCP3561_2_4R-Data-Sheet-DS200006391C.pdf 20 …ProductDocuments/DataSheets/MCP3461-2-4-Two-Four-Eight-Channel-153.6-ksps-Low-Noise-16-Bit-Delta-S… 22 …/aemDocuments/documents/APID/ProductDocuments/DataSheets/MCP3461-2-4R-Family-Data-Sheet-DS20006404… [all …]
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| D | st,stm32-adc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-adc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 STM32 ADC is a successive approximation analog-to-digital converter. 11 It has several multiplexed input channels. Conversions can be performed 13 stored in a left-aligned or right-aligned 32-bit data register. 17 voltage goes beyond the user-defined, higher or lower thresholds. 22 - Fabrice Gasnier <fabrice.gasnier@foss.st.com> 27 - st,stm32f4-adc-core [all …]
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| D | adi,ad7192.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Michael Hennerich <michael.hennerich@analog.com> 16 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7192.pdf 21 - adi,ad7190 22 - adi,ad7192 23 - adi,ad7193 24 - adi,ad7194 25 - adi,ad7195 [all …]
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| /Documentation/devicetree/bindings/iio/proximity/ |
| D | tyhx,hx9023s.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Yasin Lee <yasin.lee.x@gmail.com> 29 vdd-supply: true 31 "#address-cells": 34 "#size-cells": 38 "^channel@[0-4]$": 50 - compatible 51 - reg [all …]
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| /Documentation/devicetree/bindings/mux/ |
| D | adi,adg792a.txt | 4 - compatible : "adi,adg792a" or "adi,adg792g" 5 - #mux-control-cells : <0> if parallel (the three muxes are bound together 8 * Standard mux-controller bindings as described in mux-controller.yaml 11 - gpio-controller : if present, #gpio-cells below is required. 12 - #gpio-cells : should be <2> 13 - First cell is the GPO line number, i.e. 0 or 1 14 - Second cell is used to specify active high (0) 18 - idle-state : if present, array of states that the mux controllers will have 32 mux: mux-controller@50 { 35 #mux-control-cells = <1>; [all …]
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| /Documentation/networking/ |
| D | ethtool-netlink.rst | 27 wake-on-lan password) omitted. 37 number 1 but any non-zero value should be understood as "true" by recipient. 44 Attributes that need to be filled-in by device drivers and that are dumped to 98 representing bit values and mask of affected bits) and bit-by-bit (list of 101 Verbose (bit-by-bit) bitsets allow sending symbolic names for bits together 126 rounded up to a multiple of 32 bits. They consist of 32-bit words in host byte 141 Bit-by-bit form: nested (bitset) attribute contents: 143 +------------------------------------+--------+-----------------------------+ 145 +------------------------------------+--------+-----------------------------+ 147 +------------------------------------+--------+-----------------------------+ [all …]
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