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/Documentation/gpu/amdgpu/display/
Ddc-glossary.rst5 On this page, we try to keep track of acronyms related to the display
7 'Documentation/gpu/amdgpu/amdgpu-glossary.rst'; if you cannot find it anywhere,
19 Application-Specific Integrated Circuit
37 * DISPCLK: Display Clock
39 * DCFCLK: Display Controller Fabric Clock
49 Cathode Ray Tube Controller - commonly called "Controller" - Generates
56 Display Abstraction layer
59 Display Core
62 Display Controller
68 Display Controller Engine
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/Documentation/devicetree/bindings/auxdisplay/
Dhit,hd44780.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Hitachi HD44780 Character LCD Controller
10 - Geert Uytterhoeven <geert@linux-m68k.org>
13 The Hitachi HD44780 Character LCD Controller is commonly used on character
14 LCDs that can display one or more lines of text. It exposes an M6800 bus
15 interface, which can be used in either 4-bit or 8-bit mode. By using a
24 data-gpios:
26 GPIO pins connected to the data signal lines DB0-DB7 (8-bit mode) or
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/Documentation/devicetree/bindings/display/tegra/
Dnvidia,tegra186-dc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra186-dc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra186 (and later) Display Controller
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 pattern: "^display@[0-9a-f]+$"
19 - nvidia,tegra186-dc
20 - nvidia,tegra194-dc
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Dnvidia,tegra20-dc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-dc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra Display Controller
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 pattern: "^dc@[0-9a-f]+$"
19 - enum:
20 - nvidia,tegra20-dc
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/Documentation/devicetree/bindings/display/
Dintel,keembay-display.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/intel,keembay-display.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Intel Keem Bay display controller
10 - Anitha Chrisanthus <anitha.chrisanthus@intel.com>
11 - Edmond J Dea <edmund.j.dea@intel.com>
15 const: intel,keembay-display
19 - description: LCD registers range
21 reg-names:
[all …]
Dxylon,logicvc-display.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/display/xylon,logicvc-display.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Xylon LogiCVC display controller
11 - Paul Kocialkowski <paul.kocialkowski@bootlin.com>
14 The Xylon LogiCVC is a display controller that supports multiple layers.
16 with Xilinx Zynq-7000 SoCs and Xilinx FPGAs.
18 Because the controller is intended for use in a FPGA, most of the
19 configuration of the controller takes place at logic configuration bitstream
[all …]
Dsm501fb.txt3 The SM SM501 is a LCD controller, with proper hardware, it can also
7 - compatible : should be "smi,sm501".
8 - reg : contain two entries:
9 - First entry: System Configuration register
10 - Second entry: IO space (Display Controller register)
11 - interrupts : SMI interrupt to the cpu should be described here.
14 - mode : select a video mode:
15 <xres>x<yres>[-<bpp>][@<refresh>]
16 - edid : verbatim EDID data block describing attached display.
18 program the display controller.
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Drepaper.txt1 Pervasive Displays RePaper branded e-ink displays
4 - compatible: "pervasive,e1144cs021" for 1.44" display
5 "pervasive,e1190cs021" for 1.9" display
6 "pervasive,e2200cs021" for 2.0" display
7 "pervasive,e2271cs021" for 2.7" display
9 - panel-on-gpios: Timing controller power control
10 - discharge-gpios: Discharge control
11 - reset-gpios: RESET pin
12 - busy-gpios: BUSY pin
15 - border-gpios: Border control
[all …]
Datmel,lcdc-display.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/atmel,lcdc-display.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microchip's LCDC Display
10 - Nicolas Ferre <nicolas.ferre@microchip.com>
11 - Dharma Balasubiramani <dharma.b@microchip.com>
14 The LCD Controller (LCDC) consists of logic for transferring LCD image data
15 from an external display buffer to a TFT LCD panel. The LCDC has one display
17 interface and a look-up table to allow palletized display configurations. The
[all …]
Dallwinner,sun4i-a10-display-frontend.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-display-frontend.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A10 Display Engine Frontend
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
14 The display engine frontend does formats conversion, scaling,
20 - allwinner,sun4i-a10-display-frontend
21 - allwinner,sun5i-a13-display-frontend
[all …]
/Documentation/devicetree/bindings/display/atmel/
Datmel,hlcdc-display-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/atmel/atmel,hlcdc-display-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Atmel's High LCD Controller (HLCDC)
10 - Nicolas Ferre <nicolas.ferre@microchip.com>
11 - Alexandre Belloni <alexandre.belloni@bootlin.com>
12 - Claudiu Beznea <claudiu.beznea@tuxon.dev>
15 The LCD Controller (LCDC) consists of logic for transferring LCD image
16 data from an external display buffer to a TFT LCD panel. The LCDC has one
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/Documentation/devicetree/bindings/display/msm/
Dqcom,sc8280xp-mdss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,sc8280xp-mdss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SC8280XP Mobile Display Subsystem
10 - Bjorn Andersson <andersson@kernel.org>
13 Device tree bindings for MSM Mobile Display Subsystem (MDSS) that encapsulates
14 sub-blocks like DPU display controller, DSI and DP interfaces etc.
16 $ref: /schemas/display/msm/mdss-common.yaml#
20 const: qcom,sc8280xp-mdss
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Dqcom,mdss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,mdss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Mobile Display SubSystem (MDSS)
10 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
11 - Rob Clark <robdclark@gmail.com>
14 This is the bindings documentation for the Mobile Display Subsystem(MDSS) that
15 encapsulates sub-blocks like MDP5, DSI, HDMI, eDP, etc.
19 pattern: "^display-subsystem@[0-9a-f]+$"
[all …]
Ddpu-common.yaml2 ---
3 $id: http://devicetree.org/schemas/display/msm/dpu-common.yaml#
4 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 title: Qualcomm Display DPU common properties
9 - Krishna Manikandan <quic_mkrishn@quicinc.com>
10 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
11 - Rob Clark <robdclark@gmail.com>
14 Common properties for QCom DPU display controller.
17 # display-controller@ nodes
23 pattern: '^display-controller@[0-9a-f]+$'
[all …]
Dqcom,sm8350-mdss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,sm8350-mdss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SM8350 Display MDSS
10 - Robert Foss <robert.foss@linaro.org>
13 MSM Mobile Display Subsystem(MDSS) that encapsulates sub-blocks like
14 DPU display controller, DSI and DP interfaces etc.
16 $ref: /schemas/display/msm/mdss-common.yaml#
21 - const: qcom,sm8350-mdss
[all …]
Dqcom,x1e80100-mdss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,x1e80100-mdss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm X1E80100 Display MDSS
10 - Abel Vesa <abel.vesa@linaro.org>
13 X1E80100 MSM Mobile Display Subsystem(MDSS), which encapsulates sub-blocks like
14 DPU display controller, DP interfaces, etc.
16 $ref: /schemas/display/msm/mdss-common.yaml#
20 const: qcom,x1e80100-mdss
[all …]
Dqcom,qcm2290-mdss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,qcm2290-mdss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm QCM220 Display MDSS
10 - Loic Poulain <loic.poulain@linaro.org>
13 Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates
14 sub-blocks like DPU display controller and DSI. Device tree bindings of MDSS
17 $ref: /schemas/display/msm/mdss-common.yaml#
21 const: qcom,qcm2290-mdss
[all …]
Dqcom,sm6125-mdss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,sm6125-mdss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SM6125 Display MDSS
10 - Marijn Suijten <marijn.suijten@somainline.org>
13 SM6125 MSM Mobile Display Subsystem (MDSS), which encapsulates sub-blocks
14 like DPU display controller, DSI and DP interfaces etc.
16 $ref: /schemas/display/msm/mdss-common.yaml#
20 const: qcom,sm6125-mdss
[all …]
Dqcom,sm6375-mdss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,sm6375-mdss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SM6375 Display MDSS
10 - Konrad Dybcio <konradybcio@kernel.org>
13 SM6375 MSM Mobile Display Subsystem (MDSS), which encapsulates sub-blocks
14 like DPU display controller, DSI and DP interfaces etc.
16 $ref: /schemas/display/msm/mdss-common.yaml#
20 const: qcom,sm6375-mdss
[all …]
/Documentation/devicetree/bindings/mfd/
Datmel,hlcdc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Atmel's HLCD Controller
10 - Nicolas Ferre <nicolas.ferre@microchip.com>
11 - Alexandre Belloni <alexandre.belloni@bootlin.com>
12 - Claudiu Beznea <claudiu.beznea@tuxon.dev>
15 The Atmel HLCDC (HLCD Controller) IP available on Atmel SoCs exposes two
16 subdevices, a PWM chip and a Display Controller.
21 - atmel,at91sam9n12-hlcdc
[all …]
/Documentation/devicetree/bindings/display/panel/
Dpanel-common.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/panel/panel-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Common Properties for Display Panels
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
15 display panels. It doesn't constitute a device tree binding specification by
24 width-mm:
29 height-mm:
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/Documentation/devicetree/bindings/powerpc/fsl/
Ddiu.txt1 * Freescale Display Interface Unit
3 The Freescale DIU is a LCD controller, with proper hardware, it can also
7 - compatible : should be "fsl,diu" or "fsl,mpc5121-diu".
8 - reg : should contain at least address and length of the DIU register
10 - interrupts : one DIU interrupt should be described here.
13 - edid : verbatim EDID data block describing attached display.
15 program the display controller.
18 display@2c000 {
22 interrupt-parent = <&mpic>;
26 display@2100 {
[all …]
/Documentation/gpu/
Dtegra.rst2 drm/tegra NVIDIA Tegra GPU and display driver
5 NVIDIA Tegra SoCs support a set of display, graphics and video functions via
6 the host1x controller. host1x supplies command streams, gathered from a push
11 supports the built-in GPU, comprised of the gr2d and gr3d engines. Starting
18 - A host1x driver that provides infrastructure and access to the host1x
21 - A KMS driver that supports the display controllers as well as a number of
24 - A set of custom userspace IOCTLs that can be used to submit jobs to the
40 device using a driver-provided function which will set up the bits specific to
48 -------------------------------
50 .. kernel-doc:: include/linux/host1x.h
[all …]
/Documentation/devicetree/bindings/display/samsung/
Dsamsung,exynos7-decon.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/samsung/samsung,exynos7-decon.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung Exynos7 SoC Display and Enhancement Controller (DECON)
10 - Inki Dae <inki.dae@samsung.com>
11 - Seung-Woo Kim <sw0312.kim@samsung.com>
12 - Kyungmin Park <kyungmin.park@samsung.com>
13 - Krzysztof Kozlowski <krzk@kernel.org>
16 DECON (Display and Enhancement Controller) is the Display Controller for the
[all …]
/Documentation/fb/
Dmetronomefb.rst9 Metronomefb is a driver for the Metronome display controller. The controller
10 is from E-Ink Corporation. It is intended to be used to drive the E-Ink
11 Vizplex display media. E-Ink hosts some details of this controller and the
12 display media here http://www.e-ink.com/products/matrix/metronome.html .
17 The display and error status are each pulled through individual GPIOs.
21 PXA board used in the AM-200 EPD devkit. This example is am200epd.c
24 interface to the metronome controller. The waveform information is expected to
32 a possibility that it could have some permanent effects on the display media.

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