Searched full:divisor (Results 1 – 25 of 33) sorted by relevance
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| /Documentation/devicetree/bindings/clock/ti/ |
| D | divider.txt | 6 the register is one less than the actual divisor value. E.g:
8 register value actual divisor value
15 ti,index-starts-at-one - valid divisor values start at 1, not the default
17 register value actual divisor value
22 ti,index-power-of-two - valid divisor values are powers of two. E.g:
23 register value actual divisor value
32 Which will map the resulting values to a divisor table by their index:
33 register value actual divisor value
36 2 <invalid divisor, skipped>
63 - ti,min-div : min divisor for dividing the input clock rate, only
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| D | dpll.txt | 57 - ti,min-div : the minimum divisor to start from to round the DPLL
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| /Documentation/devicetree/bindings/clock/ |
| D | vt8500.txt | 41 Divisor device clocks:
44 - divisor-reg : shall be the register offset from PMC base for the divisor
47 - divisor-mask : shall be the mask for the divisor register. Defaults to 0x1f
70 divisor-reg = <0x328>;
71 divisor-mask = <0x3f>;
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| D | st,stm32-rcc.txt | 87 12 CLK_I2SQ_PDIV (post divisor of pll i2s q divisor)
88 13 CLK_SAIQ_PDIV (post divisor of pll sai q divisor)
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| D | moxa,moxart-clock.txt | 8 by reading registers holding multiplier and divisor information.
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| D | marvell,armada-3700-uart-clock.yaml | 18 - description: UART 2 Baud Rate Divisor Register
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| /Documentation/devicetree/bindings/sound/ |
| D | cs42l52.txt | 14 - cirrus,chgfreq-divisor : Values used to set the Charge Pump Frequency.
43 cirrus,chgfreq-divisor = <0x05>;
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| D | cs42l56.txt | 17 - cirrus,chgfreq-divisor : Values used to set the Charge Pump Frequency.
59 cirrus,chgfreq-divisor = <0x05>;
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| D | qcom,q6dsp-lpass-clocks.yaml | 27 3 = for divisor of the coupled clock
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| /Documentation/hwmon/ |
| D | aspeed-g6-pwm-tach.rst | 22 fanX_div rw Fan divisor: Supported value are power of 4 (1, 4, 16
24 The larger divisor, the less rpm accuracy and the less
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| D | g762.rst | 33 fan clock divisor. Supported value are 1, 2, 4 and 8.
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| D | adm1026.rst | 84 divisor. It can take as long as 1.5 seconds to measure all fan speeds.
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| D | nct6775.rst | 123 do not have a fan speed divider. The driver sets the most suitable fan divisor
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| D | w83627ehf.rst | 109 suitable fan divisor itself. Some fans might not be present because they
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| /Documentation/misc-devices/ |
| D | oxsemi-tornado.rst | 13 divisor is used as with the original 8250, to divide the frequency by a
21 for the usual 16-bit divisor is 115313.653, which is close enough to the
23 used for the divisor to obtain the requested baud rates by software that
45 (tcr), the clock prescaler (cpr) and the divisor (div) produced by the
94 and the clock divisor (DLM/DLL) as follows to obtain such rates if so
107 utility and its ``divisor`` and ``spd_cust`` parameters, and then select
114 the oversampling rate and the clock divisor of 62.500, 16 and 1250
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| /Documentation/devicetree/bindings/hwmon/ |
| D | ti,ina2xx.yaml | 46 Programmable gain divisor for the shunt voltage accuracy and range. This
56 value of 1 maps to ADCRANGE=1 where no gain divisor is applied to the
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| D | fan-common.yaml | 34 Divisor for the tach sampling clock, which determines the sensitivity of the tach pin.
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| /Documentation/staging/ |
| D | crc32.rst | 20 Like all division, the remainder is always smaller than the divisor.
21 To produce a 32-bit CRC, the divisor is actually a 33-bit CRC polynomial.
37 appropriate multiple of the divisor to subtract to being the remainder
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| /Documentation/driver-api/tty/ |
| D | moxa-smartio.rst | 177 spd_cust Use the custom divisor to set the speed when the
179 divisor This option sets the custom division.
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| /Documentation/networking/device_drivers/can/ |
| D | can327.rst | 275 n is an integer divisor.
277 speed to be 8/7 of the speed indicated by the divisor.
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| /Documentation/ABI/testing/ |
| D | sysfs-class-net-cdc_ncm | 110 Divisor used for IN NTB Datagram payload alignment
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| D | sysfs-tty | 111 Show the custom divisor if any that is set on this port.
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| D | sysfs-class-hwmon | 227 Fan divisor.
234 Note that this is actually an internal clock divisor, which
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| /Documentation/devicetree/bindings/display/ |
| D | solomon,ssd1307fb.yaml | 92 Clock divisor. The default value is controller-dependent.
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| /Documentation/core-api/ |
| D | memory-allocation.rst | 151 divisor of the size.
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