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/Documentation/devicetree/bindings/dma/
Ddma-router.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/dma/dma-router.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: DMA Router Common Properties
10 - Vinod Koul <vkoul@kernel.org>
13 - $ref: dma-common.yaml#
16 DMA routers are transparent IP blocks used to route DMA request
17 lines from devices to the DMA controller. Some SoCs (like TI DRA7x)
18 have more peripherals integrated with DMA requests than what the DMA
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Dnxp,lpc3220-dmamux.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/nxp,lpc3220-dmamux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: DMA multiplexer for LPC32XX SoC (DMA request router)
10 - J.M.B. Downing <jonathan.downing@nautel.com>
11 - Piotr Wojtaszczyk <piotr.wojtaszczyk@timesys.com>
14 - $ref: dma-router.yaml#
18 const: nxp,lpc3220-dmamux
23 dma-masters:
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Drenesas,rzn1-dmamux.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/renesas,rzn1-dmamux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas RZ/N1 DMA mux
10 - Miquel Raynal <miquel.raynal@bootlin.com>
13 - $ref: dma-router.yaml#
17 const: renesas,rzn1-dmamux
21 description: DMA mux first register offset within the system control parent.
23 '#dma-cells':
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Dti-dma-crossbar.txt1 Texas Instruments DMA Crossbar (DMA request router)
4 - compatible: "ti,dra7-dma-crossbar" for DRA7xx DMA crossbar
5 "ti,am335x-edma-crossbar" for AM335x and AM437x
6 - reg: Memory map for accessing module
7 - #dma-cells: Should be set to match with the DMA controller's dma-cells
8 for ti,dra7-dma-crossbar and <3> for ti,am335x-edma-crossbar.
9 - dma-requests: Number of DMA requests the crossbar can receive
10 - dma-masters: phandle pointing to the DMA controller
12 The DMA controller node need to have the following poroperties:
13 - dma-requests: Number of DMA requests the controller can handle
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Dlpc1850-dmamux.txt1 NXP LPC18xx/43xx DMA MUX (DMA request router)
4 - compatible: "nxp,lpc1850-dmamux"
5 - reg: Memory map for accessing module
6 - #dma-cells: Should be set to <3>.
7 * 1st cell contain the master dma request signal
8 * 2nd cell contain the mux value (0-3) for the peripheral
11 - dma-requests: Number of DMA requests for the mux
12 - dma-masters: phandle pointing to the DMA controller
14 The DMA controller node need to have the following poroperties:
15 - dma-requests: Number of DMA requests the controller can handle
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/Documentation/devicetree/bindings/dma/stm32/
Dst,stm32-dmamux.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/stm32/st,stm32-dmamux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 DMA MUX (DMA request router)
10 - Amelie Delaunay <amelie.delaunay@foss.st.com>
13 - $ref: /schemas/dma/dma-router.yaml#
16 "#dma-cells":
20 const: st,stm32h7-dmamux
31 access-controllers:
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/Documentation/devicetree/bindings/clock/
Drenesas,r9a06g032-sysctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/renesas,r9a06g032-sysctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Fabrizio Castro <fabrizio.castro.jz@renesas.com>
11 - Geert Uytterhoeven <geert+renesas@glider.be>
15 const: renesas,r9a06g032-sysctrl
23 - description: External 40 MHz crystal
24 - description: Optional external 32.768 kHz crystal
25 - description: Optional external JTAG input
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/Documentation/devicetree/bindings/dma/ti/
Dk3-bcdma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
5 ---
6 $id: http://devicetree.org/schemas/dma/ti/k3-bcdma.yaml#
7 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 - Peter Ujfalusi <peter.ujfalusi@gmail.com>
15 The Block Copy DMA (BCDMA) is intended to perform similar functions as the TR
16 mode channels of K3 UDMA-P.
23 Split channels can be used to service PSI-L based peripherals.
24 The peripherals can be PSI-L native or legacy, non PSI-L native peripherals
25 with PDMAs. PDMA is tasked to act as a bridge between the PSI-L fabric and the
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/Documentation/networking/device_drivers/fddi/
Dskfp.rst1 .. SPDX-License-Identifier: GPL-2.0
6 SysKonnect driver - SKFP
9 |copy| Copyright 1998-2000 SysKonnect,
11 skfp.txt created 11-May-2000
53 - SK-5521 (SK-NET FDDI-UP)
54 - SK-5522 (SK-NET FDDI-UP DAS)
55 - SK-5541 (SK-NET FDDI-FP)
56 - SK-5543 (SK-NET FDDI-LP)
57 - SK-5544 (SK-NET FDDI-LP DAS)
58 - SK-5821 (SK-NET FDDI-UP64)
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/Documentation/devicetree/bindings/sound/
Dnvidia,tegra-audio-graph-card.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra-audio-graph-card.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 - Jon Hunter <jonathanh@nvidia.com>
16 - Sameer Pujar <spujar@nvidia.com>
19 - $ref: audio-graph.yaml#
24 - nvidia,tegra210-audio-graph-card
25 - nvidia,tegra186-audio-graph-card
30 clock-names:
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/Documentation/arch/arm/stm32/
Dstm32-dma-mdma-chaining.rst1 .. SPDX-License-Identifier: GPL-2.0
4 STM32 DMA-MDMA chaining
9 ------------
11 This document describes the STM32 DMA-MDMA chaining feature. But before going
15 direct memory access controllers (DMA).
17 STM32MP1 SoCs embed both STM32 DMA and STM32 MDMA controllers. STM32 DMA
18 request routing capabilities are enhanced by a DMA request multiplexer
23 STM32 DMAMUX routes any DMA request from a given peripheral to any STM32 DMA
24 controller (STM32MP1 counts two STM32 DMA controllers) channels.
26 **STM32 DMA**
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/Documentation/admin-guide/
Dthunderbolt.rst1 .. SPDX-License-Identifier: GPL-2.0
8 manager is an entity running on the host router (host controller)
22 is expected to be accompanied with an IOMMU based DMA protection.
25 -----------------------------------
27 should be a userspace tool that handles all the low-level details, keeps
31 found in ``Documentation/ABI/testing/sysfs-bus-thunderbolt``.
35 ``/etc/udev/rules.d/99-local.rules``::
41 vulnerable to DMA attacks.
46 be DMA masters and thus read contents of the host memory without CPU and OS
102 -----------------------------------------------------------------
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/Documentation/networking/device_drivers/ethernet/cirrus/
Dcs89x0.rst1 .. SPDX-License-Identifier: GPL-2.0
33 2.1 CS8900-based Adapter Configuration
34 2.2 CS8920-based Adapter Configuration
41 4.3 Compiling the driver to support Rx DMA
46 5.2.1 Diagnostic Self-Test
66 The CS8900-based ISA Ethernet Adapters from Cirrus Logic follow
67 IEEE 802.3 standards and support half or full-duplex operation in ISA bus
69 in 16-bit ISA or EISA bus expansion slots and are available in
70 10BaseT-only or 3-media configurations (10BaseT, 10Base2, and AUI for 10Base-5
73 CS8920-based adapters are similar to the CS8900-based adapter with additional
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/Documentation/admin-guide/media/
Dimx.rst1 .. SPDX-License-Identifier: GPL-2.0
7 ------------
15 - Image DMA Controller (IDMAC)
16 - Camera Serial Interface (CSI)
17 - Image Converter (IC)
18 - Sensor Multi-FIFO Controller (SMFC)
19 - Image Rotator (IRT)
20 - Video De-Interlacing or Combining Block (VDIC)
22 The IDMAC is the DMA controller for transfer of image frames to and from
23 memory. Various dedicated DMA channels exist for both video capture and
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/Documentation/netlink/specs/
Drt_link.yaml1 # SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)
3 name: rt-link
4 protocol: netlink-raw
11 -
12 name: ifinfo-flags
15 -
17 -
19 -
21 -
23 -
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/Documentation/trace/coresight/
Dcoresight.rst2 Coresight - HW Assisted Tracing on ARM
9 ------------
16 that have many SoCs and other components like GPU and DMA engines. ARM has
38 0 CPU 0<-->: C : 0 CPU 0<-->: C : : C : @ STM @ || System ||
39 |->0000000 : T : |->0000000 : T : : T :<--->@@@@@ || Memory ||
40 | #######<-->: I : | #######<-->: I : : I : @@@<-| ||||||||||||
43 | |->### | ! | |->### | ! | ! . | || DAP ||
49 *****************************************************************<-|
63 | * ===== F =====<---------|
65 |-->:: CTI ::<!! === N ===
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