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/Documentation/devicetree/bindings/power/
Ddomain-idle-state.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/domain-idle-state.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: PM Domain Idle States
10 - Ulf Hansson <ulf.hansson@linaro.org>
13 A domain idle state node represents the state parameters that will be used to
14 select the state when there are no active components in the PM domain.
18 const: domain-idle-states
21 "^(cpu|cluster|domain)-":
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Dpower-domain.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/power-domain.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rafael J. Wysocki <rjw@rjwysocki.net>
11 - Kevin Hilman <khilman@kernel.org>
12 - Ulf Hansson <ulf.hansson@linaro.org>
20 This device tree binding can be used to bind PM domain consumer devices with
21 their PM domains provided by PM domain providers. A PM domain provider can be
24 phandle arguments (so called PM domain specifiers) of length specified by the
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Dpower_domain.txt7 This device tree binding can be used to bind PM domain consumer devices with
8 their PM domains provided by PM domain providers. A PM domain provider can be
11 phandle arguments (so called PM domain specifiers) of length specified by the
12 #power-domain-cells property in the PM domain provider node.
14 ==PM domain providers==
16 See power-domain.yaml.
18 ==PM domain consumers==
21 - power-domains : A list of PM domain specifiers, as defined by bindings of
22 the power controller that is the PM domain provider.
25 - power-domain-names : A list of power domain name strings sorted in the same
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/Documentation/devicetree/bindings/arm/
Dpsci.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Power State Coordination Interface (PSCI)
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
14 ARM DEN 0022A ("Power State Coordination Interface System Software on ARM
15 processors") can be used by Linux to initiate various CPU-centric power
25 r0 => 32-bit Function ID / return value
26 {r1 - r3} => Parameters
31 [2] Power State Coordination Interface (PSCI) specification
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Darm,coresight-cpu-debug.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/arm/arm,coresight-cpu-debug.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mathieu Poirier <mathieu.poirier@linaro.org>
11 - Mike Leach <mike.leach@linaro.org>
12 - Leo Yan <leo.yan@linaro.org>
13 - Suzuki K Poulose <suzuki.poulose@arm.com>
18 external debug module is mainly used for two modes: self-hosted debug and
21 module provides sample-based profiling extension, which can be used to sample
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Dcpus.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
21 with updates for 32-bit and 64-bit ARM systems provided in this document.
30 - square brackets define bitfields, eg reg[7:0] value of the bitfield in
59 On 32-bit ARM v7 or later systems this property is
68 On ARM v8 64-bit systems this property is required
71 * If cpus node's #address-cells property is set to 2
79 * If cpus node's #address-cells property is set to 1
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/Documentation/trace/coresight/
Dcoresight-cpu-debug.rst9 ------------
11 Coresight CPU debug module is defined in ARMv8-a architecture reference manual
13 debug module and it is mainly used for two modes: self-hosted debug and
16 explore debugging method which rely on self-hosted debug mode, this document
19 The debug module provides sample-based profiling extension, which can be used
20 to sample CPU program counter, secure state and exception level, etc; usually
21 every CPU has one dedicated debug module to be connected. Based on self-hosted
29 --------------
31 - During driver registration, it uses EDDEVID and EDDEVID1 - two device ID
32 registers to decide if sample-based profiling is implemented or not. On some
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/Documentation/trace/
Devents-power.rst8 - Power state switch which reports events related to suspend (S-states),
9 cpuidle (C-states) and cpufreq (P-states)
10 - System clock related changes
11 - Power domains related changes and transitions
18 1. Power state switch events
22 -----------------
24 A 'cpu' event class gathers the CPU-related events: cpuidle and
28 cpu_idle "state=%lu cpu_id=%lu"
29 cpu_frequency "state=%lu cpu_id=%lu"
36 machine_suspend "state=%lu"
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/Documentation/ABI/testing/
Dsysfs-class-regulator1 What: /sys/class/regulator/.../state
7 state. This reports the regulator enable control, for
20 supplying power to the system (unless some non-Linux
23 'unknown' means software cannot determine the state, or
24 the reported state is invalid.
38 - off
39 - on
40 - error
41 - fast
42 - normal
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Dsysfs-devices-system-cpu2 Date: pre-git history
3 Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
18 Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
37 See Documentation/admin-guide/cputopology.rst for more information.
43 Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
58 Contact: Linux memory management mailing list <linux-mm@kvack.org>
67 /sys/devices/system/cpu/cpu42/node2 -> ../../node/node2
77 Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
89 core_siblings_list: human-readable list of the logical CPU
99 thread_siblings_list: human-readable list of cpuX's hardware
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/Documentation/devicetree/bindings/cpu/
Didle-states.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/cpu/idle-states.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Idle states
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
11 - Anup Patel <anup@brainfault.org>
15 1 - Introduction
18 ARM and RISC-V systems contain HW capable of managing power consumption
19 dynamically, where cores can be put in different low-power states (ranging
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/Documentation/devicetree/bindings/mmc/
Dti-omap-hsmmc.txt10 --------------------
11 - compatible:
12 Should be "ti,omap2-hsmmc", for OMAP2 controllers
13 Should be "ti,omap3-hsmmc", for OMAP3 controllers
14 Should be "ti,omap3-pre-es3-hsmmc" for OMAP3 controllers pre ES3.0
15 Should be "ti,omap4-hsmmc", for OMAP4 controllers
16 Should be "ti,am33xx-hsmmc", for AM335x controllers
17 Should be "ti,k2g-hsmmc", "ti,omap4-hsmmc" for 66AK2G controllers.
20 ---------------------------------
22 - ti,hwmods: Must be "mmc<n>", n is controller instance starting 1.
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/Documentation/driver-api/pm/
Ddevices.rst1 .. SPDX-License-Identifier: GPL-2.0
10 :Copyright: |copy| 2010-2011 Rafael J. Wysocki <rjw@sisk.pl>, Novell Inc.
18 management (PM) code is also driver-specific. Most drivers will do very
22 This writeup gives an overview of how drivers interact with system-wide
25 background for the domain-specific work you'd do with any specific driver.
31 Drivers will use one or both of these models to put devices into low-power
36 Drivers can enter low-power states as part of entering system-wide
37 low-power states like "suspend" (also known as "suspend-to-RAM"), or
39 "suspend-to-disk").
42 by implementing various role-specific suspend and resume methods to
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/Documentation/devicetree/bindings/mfd/
Drohm,bd71847-pmic.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mfd/rohm,bd71847-pmic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <mazziesaccount@gmail.com>
14 single-core, dual-core, and quad-core SoCs such as NXP-i.MX 8M. It is
18 …/www.rohm.com/products/power-management/power-management-ic-for-system/industrial-consumer-applica…
19 …//www.rohm.com/products/power-management/power-management-ic-for-system/industrial-consumer-applic…
24 - rohm,bd71847
25 - rohm,bd71850
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Drohm,bd71837-pmic.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mfd/rohm,bd71837-pmic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <mazziesaccount@gmail.com>
13 BD71837MWV is programmable Power Management ICs for powering single-core,
14 dual-core, and quad-core SoCs such as NXP-i.MX 8M. It is optimized for low
18 …/www.rohm.com/products/power-management/power-management-ic-for-system/industrial-consumer-applica…
35 clock-names:
38 "#clock-cells":
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/Documentation/devicetree/bindings/thermal/
Dthermal-cooling-devices.yaml1 # SPDX-License-Identifier: (GPL-2.0)
4 ---
5 $id: http://devicetree.org/schemas/thermal/thermal-cooling-devices.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Amit Kucheria <amitk@kernel.org>
20 - thermal-sensor: device that measures temperature, has SoC-specific bindings
21 - cooling-device: device used to dissipate heat either passively or actively
22 - thermal-zones: a container of the following node types used to describe all
28 - Passive cooling: by means of regulating device performance. A typical
31 - Active cooling: by means of activating devices in order to remove the
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/Documentation/devicetree/bindings/soc/qcom/
Dqcom,rpmh-rsc.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/soc/qcom/qcom,rpmh-rsc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
20 (Resource State Coordinator a.k.a RSC) that can handle multiple sleep and
26 have powered off to facilitate idle power saving. TCS could be classified as::
27 ACTIVE - Triggered by Linux
28 SLEEP - Triggered by F/W
29 WAKE - Triggered by F/W
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/Documentation/devicetree/bindings/media/
Dstih407-c8sectpfe.txt8 which converts from the RF to digital domain. Demodulators and tuners are usually
14 - compatible : Should be "stih407-c8sectpfe"
16 - reg : Address and length of register sets for each device in
17 "reg-names"
19 - reg-names : The names of the register addresses corresponding to the
21 - c8sectpfe: c8sectpfe registers
22 - c8sectpfe-ram: c8sectpfe internal sram
24 - clocks : phandle list of c8sectpfe clocks
25 - clock-names : should be "c8sectpfe"
26 See: Documentation/devicetree/bindings/clock/clock-bindings.txt
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/Documentation/power/
Druntime_pm.rst5 (C) 2009-2011 Rafael J. Wysocki <rjw@sisk.pl>, Novell Inc.
18 put their PM-related work items. It is strongly recommended that pm_wq be
20 them to be synchronized with system-wide power transitions (suspend to RAM,
53 The ->runtime_suspend(), ->runtime_resume() and ->runtime_idle() callbacks
57 1. PM domain of the device, if the device's PM domain object, dev->pm_domain,
60 2. Device type of the device, if both dev->type and dev->type->pm are present.
62 3. Device class of the device, if both dev->class and dev->class->pm are
65 4. Bus type of the device, if both dev->bus and dev->bus->pm are present.
69 dev->driver->pm directly (if present).
72 priority order of callbacks from high to low is: PM domain, device type, class
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/Documentation/devicetree/bindings/soc/ti/
Dwkup-m3-ipc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/ti/wkup-m3-ipc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dave Gerlach <d-gerlach@ti.com>
11 - Drew Fustini <dfustini@baylibre.com>
14 The TI AM33xx and AM43xx family of devices use a small Cortex M3 co-processor
17 C-states for CPU Idle. Once the wkup_m3_ipc driver uses the wkup_m3_rproc driver
29 On some boards like the AM335x EVM-SK and the AM437x GP EVM, a GPIO pin is
33 is in the wakeup power domain.
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/Documentation/RCU/Design/Requirements/
DRequirements.rst16 ------------
18 Read-copy update (RCU) is a synchronization mechanism that is often used
19 as a replacement for reader-writer locking. RCU is unusual in that
20 updaters do not block readers, which means that RCU's read-side
28 thought of as an informal, high-level specification for RCU. It is
40 #. `Fundamental Non-Requirements`_
42 #. `Quality-of-Implementation Requirements`_
44 #. `Software-Engineering Requirements`_
53 ------------------------
58 #. `Grace-Period Guarantee`_
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/Documentation/admin-guide/
Dcgroup-v2.rst1 .. _cgroup-v2:
11 conventions of cgroup v2. It describes all userland-visible aspects
14 v1 is available under :ref:`Documentation/admin-guide/cgroup-v1/index.rst <cgroup-v1>`.
19 1-1. Terminology
20 1-2. What is cgroup?
22 2-1. Mounting
23 2-2. Organizing Processes and Threads
24 2-2-1. Processes
25 2-2-2. Threads
26 2-3. [Un]populated Notification
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/Documentation/admin-guide/cgroup-v1/
Dcpusets.rst11 - Portions Copyright (c) 2004-2006 Silicon Graphics, Inc.
12 - Modified by Paul Jackson <pj@sgi.com>
13 - Modified by Christoph Lameter <cl@linux.com>
14 - Modified by Paul Menage <menage@google.com>
15 - Modified by Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
41 ----------------------
45 an on-line node that contains memory.
54 Documentation/admin-guide/cgroup-v1/cgroups.rst.
73 ----------------------------
77 non-uniform access times (NUMA) presents additional challenges for
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/Documentation/networking/device_drivers/hamradio/
Dz8530drv.rst1 .. SPDX-License-Identifier: GPL-2.0
5 SCC.C - Linux driver for Z8530 based HDLC cards for AX.25
14 1. ftp://ftp.ccac.rwth-aachen.de/pub/jr/z8530drv-utils_3.0-3.tar.gz
16 2. ftp://ftp.pspt.fi/pub/ham/linux/ax25/z8530drv-utils_3.0-3.tar.gz
41 AX.25-HOWTO on how to emulate a KISS TNC on network device drivers.
54 please read 'man insmod' that comes with module-init-tools.
64 of your rc.*-files. This has to be done BEFORE you can
92 - this is just a delimiter to make sccinit a bit simpler to
96 - the address of the data port A of this Z8530 (needed)
98 - the address of the control port A (needed)
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/Documentation/process/
Dmaintainer-netdev.rst1 .. SPDX-License-Identifier: GPL-2.0
3 .. _netdev-FAQ:
10 -----
12 - designate your patch to a tree - ``[PATCH net]`` or ``[PATCH net-next]``
13 - for fixes the ``Fixes:`` tag is required, regardless of the tree
14 - don't post large series (> 15 patches), break them up
15 - don't repost your patches within one 24h period
16 - reverse xmas tree
19 ------
21 netdev is a mailing list for all network-related Linux stuff. This
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