Searched full:downstream (Results 1 – 25 of 50) sorted by relevance
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| /Documentation/devicetree/bindings/usb/ |
| D | aspeed,usb-vhub.yaml | 16 the Virtual Hub's downstream USB devices.
19 revisions. AST2400 and AST2500 Virtual Hub supports 5 downstream devices
20 and 15 generic endpoints, while AST2600 Virtual Hub supports 7 downstream
39 aspeed,vhub-downstream-ports:
40 description: Number of downstream ports supported by the Virtual Hub
107 - aspeed,vhub-downstream-ports
120 aspeed,vhub-downstream-ports = <5>;
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| D | realtek,rts5411.yaml | 46 1st downstream facing USB port
51 2nd downstream facing USB port
56 3rd downstream facing USB port
61 4th downstream facing USB port
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| D | ti,hd3ss3220.yaml | 15 HD3SS3220 can be configured as a Downstream Facing Port (DFP), Upstream Facing Port (UFP) or a
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| D | fsl,imx8mp-dwc3.yaml | 55 Indicates if the device attached to a downstream port is
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| /Documentation/devicetree/bindings/i2c/ |
| D | i2c-atr.yaml | 14 ("upstream") port and N I2C master child ("downstream") ports, and
15 forwards transactions from upstream to the appropriate downstream port
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| D | i2c-mux-ltc4306.txt | 24 - ltc,downstream-accelerators-enable: Enables the rise time accelerators
25 on the downstream port.
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| /Documentation/ABI/testing/ |
| D | usb-charger-uevent | 14 USB_CHARGER_SDP_TYPE Standard Downstream Port
15 USB_CHARGER_CDP_TYPE Charging Downstream Port
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| D | sysfs-bus-usb-lvstest | 16 Set "U1 timeout" for the downstream port where Link Layer
24 Set "U2 timeout" for the downstream port where Link Layer
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| /Documentation/devicetree/bindings/power/supply/ |
| D | gpio-charger.yaml | 27 - usb-sdp # USB standard downstream port
29 - usb-cdp # USB charging downstream port
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| /Documentation/devicetree/bindings/display/bridge/ |
| D | fsl,imx8qxp-pxl2dpi.yaml | 37 A phandle which points to companion PXL2DPI which is used by downstream
50 description: The PXL2DPI output port node to downstream bridge.
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| D | fsl,imx8qxp-pixel-link.yaml | 54 description: The pixel link output port node to downstream bridge.
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| /Documentation/devicetree/bindings/pci/ |
| D | pci.txt | 32 root port to downstream device and host bridge drivers can do programming
69 downstream of this port are external to the machine. The OS can, for
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| D | pci-armada8k.txt | 41 ranges = <0x81000000 0 0xf9000000 0 0xf9000000 0 0x10000 /* downstream I/O */
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| D | axis,artpec6-pcie.txt | 35 /* downstream I/O */
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| D | versatile.yaml | 67 <0x01000000 0 0x00000000 0x43000000 0 0x00010000>, /* downstream I/O */
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| D | nvidia,tegra194-pcie.yaml | 155 optimum number of FC (Flow Control) credits with downstream devices:
306 … ranges = <0x81000000 0x0 0x38100000 0x0 0x38100000 0x0 0x00100000>, /* downstream I/O */
372 … <0x01000000 0x0 0x36100000 0x00 0x36100000 0x0 0x00100000>; /* downstream I/O */
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| D | nvidia,tegra20-pcie.txt | 189 0x81000000 0 0 0x82000000 0 0x00010000 /* downstream I/O */
291 0x81000000 0 0 0x02000000 0 0x00010000 /* downstream I/O */
395 0x81000000 0 0x0 0x0 0x12000000 0 0x00010000 /* downstream I/O (64 KiB) */
491 0x81000000 0 0x0 0x0 0x12000000 0 0x00010000 /* downstream I/O (64 KiB) */
590 0x81000000 0 0x0 0x0 0x50000000 0 0x00010000 /* downstream I/O (64 KiB) */
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| /Documentation/admin-guide/perf/ |
| D | hisi-pcie-pmu.rst | 9 all Endpoints downstream these Root Ports.
66 PMU could only monitor the performance of traffic downstream target Root
67 Ports or downstream target Endpoint. PCIe PMU driver support "port" and
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| /Documentation/i2c/ |
| D | i2c-address-translators.rst | 14 ("upstream") port and N I2C master child ("downstream") ports, and
15 forwards transactions from upstream to the appropriate downstream port
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| /Documentation/devicetree/bindings/phy/ |
| D | phy-tegra194-p2u.yaml | 37 the root port and its immediate downstream device.
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| /Documentation/driver-api/driver-model/ |
| D | overview.rst | 38 Downstream Access
71 downstream driver would break. On the other hand, if only the bus layer
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| /Documentation/devicetree/bindings/iommu/ |
| D | arm,smmu.yaml | 294 - description: bus clock required for downstream bus access and for
336 - description: bus clock required for downstream bus access and for
363 - description: bus clock required for downstream bus access
383 - description: bus clock required for downstream bus access and for
439 - description: bus clock required for downstream bus access and for
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| /Documentation/PCI/ |
| D | pcieaer-howto.rst | 156 with downstream device drivers associated with a hierarchy in question
185 Endpoint <==> Downstream Port B <==> Upstream Port A <==> Root Port
188 Downstream Port B and Endpoint.
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| /Documentation/networking/device_drivers/atm/ |
| D | cxacru.rst | 48 - Downstream stats.
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| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | arm,gic-v3.yaml | 113 downstream interconnect.
206 downstream interconnect.
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