Searched +full:dp +full:- +full:aux +full:- +full:bus (Results 1 – 11 of 11) sorted by relevance
| /Documentation/devicetree/bindings/display/ |
| D | dp-aux-bus.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/dp-aux-bus.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: DisplayPort AUX bus 10 - Douglas Anderson <dianders@chromium.org> 14 are hooked up to them. This is the DP AUX bus. Over the DP AUX bus 16 particular, DP sinks support DDC over DP AUX which allows tunneling 17 a standard I2C DDC connection over the AUX channel. 19 To model this relationship, DP sinks should be placed as children [all …]
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| /Documentation/devicetree/bindings/display/msm/ |
| D | dp-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/msm/dp-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Kuogee Hsieh <quic_khsieh@quicinc.com> 19 - enum: 20 - qcom,sc7180-dp 21 - qcom,sc7280-dp 22 - qcom,sc7280-edp 23 - qcom,sc8180x-dp [all …]
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| D | qcom,sc7280-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sc7280-mdss.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krishna Manikandan <quic_mkrishn@quicinc.com> 14 sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree 17 $ref: /schemas/display/msm/mdss-common.yaml# 21 const: qcom,sc7280-mdss 25 - description: Display AHB clock from gcc 26 - description: Display AHB clock from dispcc [all …]
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| /Documentation/devicetree/bindings/display/panel/ |
| D | panel-edp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/panel/panel-edp.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Probeable (via DP AUX / EDID) eDP Panels with simple poweron sequences 10 - Douglas Anderson <dianders@chromium.org> 14 to a Embedded DisplayPort AUX bus (see display/dp-aux-bus.yaml) without 17 board, either for second-sourcing purposes or to support multiple SKUs 21 represented under the DP AUX bus. This means that we can use any 22 information provided by the DP AUX bus (including the EDID) to identify [all …]
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| /Documentation/devicetree/bindings/display/bridge/ |
| D | analogix,anx7625.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Xin Ji <xji@analogixsemi.com> 14 The ANX7625 is an ultra-low power 4K Mobile HD Transmitter 28 enable-gpios: 32 reset-gpios: 36 vdd10-supply: 39 vdd18-supply: 42 vdd33-supply: [all …]
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| D | cdns,mhdp8546.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Swapnil Jakhade <sjakhade@cadence.com> 11 - Yuti Amonkar <yamonkar@cadence.com> 16 - cdns,mhdp8546 17 - ti,j721e-mhdp8546 22 - description: 24 The AUX and PMA registers are not part of this range, they are instead 26 - description: [all …]
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| D | ps8640.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Nicolas Boichat <drinkcat@chromium.org> 13 The PS8640 is a low power MIPI-to-eDP video format converter supporting 28 powerdown-gpios: 32 reset-gpios: 36 vdd12-supply: 39 vdd33-supply: 42 aux-bus: [all …]
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| D | ti,sn65dsi86.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Douglas Anderson <dianders@chromium.org> 23 enable-gpios: 27 suspend-gpios: 31 no-hpd: 37 vccio-supply: 40 vpll-supply: 43 vcca-supply: [all …]
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| /Documentation/devicetree/bindings/display/tegra/ |
| D | nvidia,tegra124-sor.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra124-sor.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 15 and DP outputs. 19 pattern: "^sor@[0-9a-f]+$" 23 - enum: 24 - nvidia,tegra124-sor [all …]
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| D | nvidia,tegra124-dpaux.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra124-dpaux.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NVIDIA Tegra DisplayPort AUX Interface 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 18 When configured for DisplayPort AUX operation, the DPAUX controller 20 AUX channel. 24 pattern: "^dpaux@[0-9a-f]+$" [all …]
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| /Documentation/admin-guide/media/ |
| D | cec.rst | 1 .. SPDX-License-Identifier: GPL-2.0 12 - Exynos4 13 - Exynos5 14 - STIH4xx HDMI CEC 15 - V4L2 adv7511 (same HW, but a different driver from the drm adv7511) 16 - stm32 17 - Allwinner A10 (sun4i) 18 - Raspberry Pi 19 - dw-hdmi (Synopsis IP) 20 - amlogic (meson ao-cec and ao-cec-g12a) [all …]
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