Searched +full:dual +full:- +full:mode (Results 1 – 25 of 131) sorted by relevance
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| /Documentation/devicetree/bindings/display/bridge/ |
| D | thine,thc63lvd1024.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jacopo Mondi <jacopo+renesas@jmondi.org>
11 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
14 The THC63LVD1024 is a dual link LVDS receiver designed to convert LVDS
15 streams to parallel data outputs. The chip supports single/dual input/output
19 Single or dual operation mode, output data mapping and DDR output modes are
30 The device can operate in single or dual input and output modes.
32 When operating in single input mode, all pixels are received on port@0,
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| D | fsl,imx8qxp-ldb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-ldb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liu Ying <victor.liu@nxp.com>
23 LDB split mode to support a dual link LVDS display. The channel indexes
29 in dual mode or split mode. In dual mode, the two channels output identical
30 data. In split mode, channel0 outputs odd pixels and channel1 outputs even
41 - fsl,imx8qm-ldb
42 - fsl,imx8qxp-ldb
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| /Documentation/devicetree/bindings/usb/ |
| D | mediatek,mtu3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 - $ref: usb-drd.yaml
23 - enum:
24 - mediatek,mt2712-mtu3
25 - mediatek,mt8173-mtu3
26 - mediatek,mt8183-mtu3
27 - mediatek,mt8186-mtu3
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| D | ux500-usb.txt | 4 - compatible : Should be "stericsson,db8500-musb"
5 - reg : Offset and length of registers
6 - interrupts : Interrupt; mode, number and trigger
7 - dr_mode : Dual-role; either host mode "host", peripheral mode "peripheral"
11 - dmas : A list of dma channels;
12 dma-controller, event-line, fixed-channel, flags
13 - dma-names : An ordered list of channel names affiliated to the above
18 compatible = "stericsson,db8500-musb";
21 interrupt-names = "mc";
25 dmas = <&dma 38 0 0x2>, /* Logical - DevToMem */
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| /Documentation/devicetree/bindings/timer/ |
| D | ti,keystone-timer.txt | 3 This document provides bindings for the 64-bit timer in the KeyStone
4 architecture devices. The timer can be configured as a general-purpose 64-bit
5 timer, dual general-purpose 32-bit timers. When configured as dual 32-bit
6 timers, each half can operate in conjunction (chain mode) or independently
7 (unchained mode) of each other.
9 It is global timer is a free running up-counter and can generate interrupt
17 - compatible : should be "ti,keystone-timer".
18 - reg : specifies base physical address and count of the registers.
19 - interrupts : interrupt generated by the timer.
20 - clocks : the clock feeding the timer clock.
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| D | ti,da830-timer.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timer/ti,da830-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Kousik Sanagavarapu <five231003@gmail.com>
13 This is a 64-bit timer found on TI's DaVinci architecture devices. The timer
14 can be configured as a general-purpose 64-bit timer, dual general-purpose
15 32-bit timers. When configured as dual 32-bit timers, each half can operate
16 in conjunction (chain mode) or independently (unchained mode) of each other.
18 The timer is a free running up-counter and can generate interrupts when the
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| D | ti,timer-dm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timer/ti,timer-dm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI dual-mode timer
10 - Tony Lindgren <tony@atomide.com>
13 The TI dual-mode timer is a general purpose timer with PWM capabilities.
18 - items:
19 - enum:
20 - ti,am335x-timer
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| D | arm,sp804.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARM sp804 Dual Timers
10 - Haojian Zhuang <haojian.zhuang@linaro.org>
14 16 or 32 bit operation and capable of running in one-shot, periodic, or
15 free-running mode. The input clock is shared, but can be gated and prescaled
18 There is a viriant of Arm SP804: Hisilicon 64-bit SP804 timer. Some Hisilicon
27 - arm,sp804
28 - hisilicon,sp804
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| /Documentation/devicetree/bindings/display/ |
| D | truly,nt35597.txt | 7 - compatible: should be "truly,nt35597-2K-display"
8 - vdda-supply: phandle of the regulator that provides the supply voltage
10 - vdispp-supply: phandle of the regulator that provides the supply voltage
12 - vdispn-supply: phandle of the regulator that provides the supply voltage
14 - reset-gpios: phandle of gpio for reset line
15 This should be 8mA, gpio can be configured using mux, pinctrl, pinctrl-names
17 - mode-gpios: phandle of the gpio for choosing the mode of the display
18 for single DSI or Dual DSI
19 This should be low for dual DSI and high for single DSI mode
20 - ports: This device has two video ports driven by two DSIs. Their connections
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| /Documentation/devicetree/bindings/connector/ |
| D | usb-connector.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/connector/usb-connector.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
20 - enum:
21 - usb-a-connector
22 - usb-b-connector
23 - usb-c-connector
25 - items:
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| /Documentation/devicetree/bindings/net/can/ |
| D | st,stm32-bxcan.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/can/st,stm32-bxcan.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 - Dario Binacchi <dario.binacchi@amarulasolutions.com>
15 - $ref: can-controller.yaml#
20 - st,stm32f4-bxcan
22 st,can-primary:
24 Primary mode of the bxCAN peripheral is only relevant if the chip has
25 two CAN peripherals in dual CAN configuration. In that case they share
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| /Documentation/devicetree/bindings/pwm/ |
| D | ti,omap-dmtimer-pwm.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pwm/ti,omap-dmtimer-pwm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI dual mode timer PWM controller
10 - Tony Lindgren <tony@atomide.com>
13 TI dual mode timer instances have an IO pin for PWM capability
16 - $ref: pwm.yaml#
20 const: ti,omap-dmtimer-pwm
22 "#pwm-cells":
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| /Documentation/devicetree/bindings/gpio/ |
| D | xlnx,gpio-xilinx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/xlnx,gpio-xilinx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Neeli Srinivas <srinivas.neeli@amd.com>
14 to an AXI4-Lite interface. The AXI GPIO can be configured as either
15 a single or a dual-channel device. The width of each channel is
22 - xlnx,xps-gpio-1.00.a
27 "#gpio-cells":
33 gpio-controller: true
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| /Documentation/devicetree/bindings/iio/adc/ |
| D | xilinx-xadc.txt | 22 - compatible: Should be one of
23 * "xlnx,zynq-xadc-1.00.a": When using the ZYNQ device
25 * "xlnx,axi-xadc-1.00.a": When using the axi-xadc pcore to
27 * "xlnx,system-management-wiz-1.3": When using the
30 - reg: Address and length of the register set for the device
31 - interrupts: Interrupt for the XADC control interface.
32 - clocks: When using the ZYNQ this must be the ZYNQ PCAP clock,
33 when using the axi-xadc or the axi-system-management-wizard this must be
37 - xlnx,external-mux:
40 * "single": External multiplexer mode is used with one
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| /Documentation/devicetree/bindings/iio/frequency/ |
| D | adi,admfm2000.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: ADMFM2000 Dual Microwave Down Converter
11 - Kim Seer Paller <kimseer.paller@analog.com>
14 Dual microwave down converter module with input RF and LO frequency ranges
22 - adi,admfm2000
24 '#address-cells':
27 '#size-cells':
31 "^channel@[0-1]$":
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| /Documentation/devicetree/bindings/net/ |
| D | sunplus,sp7021-emac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/net/sunplus,sp7021-emac.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Sunplus SP7021 Dual Ethernet MAC
11 - Wells Lu <wellslutw@gmail.com>
14 Sunplus SP7021 dual 10M/100M Ethernet MAC controller.
19 const: sunplus,sp7021-emac
33 ethernet-ports:
39 "#address-cells":
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| D | ti,cpsw-switch.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/ti,cpsw-switch.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Siddharth Vadapalli <s-vadapalli@ti.com>
11 - Roger Quadros <rogerq@kernel.org>
14 The 3-port switch gigabit ethernet subsystem provides ethernet packet
24 - const: ti,cpsw-switch
25 - items:
26 - const: ti,am335x-cpsw-switch
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| /Documentation/devicetree/bindings/leds/ |
| D | richtek,rt8515.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Richtek RT8515 1.5A dual channel LED driver
10 - Linus Walleij <linus.walleij@linaro.org>
13 The Richtek RT8515 is a dual channel (two mode) LED driver that
14 supports driving a white LED in flash or torch mode. The maximum
15 current for each mode is defined in hardware using two resistors
22 enf-gpios:
26 ent-gpios:
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| D | leds-lm3532.txt | 1 * Texas Instruments - lm3532 White LED driver with ambient light sensing
4 The LM3532 provides the 3 high-voltage, low-side current sinks. The device is
5 programmable over an I2C-compatible interface and has independent
10 The main features of the LM3532 include dual ambient light sensor inputs
11 each with 32 internal voltage setting resistors, 8-bit logarithmic and linear
12 brightness control, dual external PWM brightness control inputs, and up to
16 - compatible : "ti,lm3532"
17 - reg : I2C slave address
18 - #address-cells : 1
19 - #size-cells : 0
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| /Documentation/fb/ |
| D | viafb.rst | 6 --------
15 ---------------
34 ----------------------
47 - 640x480 (default)
48 - 720x480
49 - 800x600
50 - 1024x768
53 - 8, 16, 32 (default:32)
56 - 60, 75, 85, 100, 120 (default:60)
59 - 0 : expansion (default)
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| /Documentation/devicetree/bindings/mfd/ |
| D | maxim,max8925.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lee Jones <lee@kernel.org>
22 interrupt-controller: true
24 "#interrupt-cells":
29 maxim,tsc-irq:
37 "^SDV[1-3]$|^LDO[1-9]$|^LDO1[0-9]$|^LDO20$":
38 description: regulator configuration for SDV1-3 and LDO1-20
47 maxim,max8925-dual-string:
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| /Documentation/devicetree/bindings/display/panel/ |
| D | novatek,nt35950.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Novatek NT35950-based display panels
10 - AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
13 The nt35950 IC from Novatek is a Driver IC used to drive MIPI-DSI panels,
14 with Static RAM for content retention in command mode and also supports
15 video mode with VESA Frame Buffer Compression or Display Stream Compression
16 on single, or dual dsi port(s).
22 - $ref: panel-common-dual.yaml#
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| /Documentation/devicetree/bindings/remoteproc/ |
| D | ti,k3-r5f-rproc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ti,k3-r5f-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Suman Anna <s-anna@ti.com>
13 The TI K3 family of SoCs usually have one or more dual-core Arm Cortex R5F
14 processor subsystems/clusters (R5FSS). The dual core cluster can be used
15 either in a LockStep mode providing safety/fault tolerance features or in a
16 Split mode providing two individual compute cores for doubling the compute
20 AM64x SoCs do not support LockStep mode, but rather a new non-safety mode
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| /Documentation/networking/device_drivers/ethernet/ti/ |
| D | cpsw_switchdev.rst | 1 .. SPDX-License-Identifier: GPL-2.0
17 ip -d link show dev sw0p1 | grep switchid
23 Dual mac mode
26 - The new (cpsw_new.c) driver is operating in dual-emac mode by default, thus
30 - optimized promiscuous mode: The P0_UNI_FLOOD (both ports) is enabled in
32 So, Ports in promiscuous mode will keep possibility of mcast and vlan
34 to the same bridge, but without enabling "switch" mode, or to different
36 - learning disabled on ports as it make not too much sense for
37 segregated ports - no forwarding in HW.
38 - enabled basic support for devlink.
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| /Documentation/sound/hd-audio/ |
| D | models.rst | 2 HD-Audio Codec-Specific Models
8 3-jack in back and a headphone out
9 3stack-digout
10 3-jack in back, a HP out and a SPDIF out
12 5-jack in back, 2-jack in front
13 5stack-digout
14 5-jack in back, 2-jack in front, a SPDIF out
16 6-jack in back, 2-jack in front
17 6stack-digout
18 6-jack with a SPDIF out
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