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/Documentation/devicetree/bindings/display/panel/
Dpanel-edp-legacy.yaml4 $id: http://devicetree.org/schemas/display/panel/panel-edp-legacy.yaml#
7 title: Legacy eDP panels from before the "edp-panel" compatible
13 This binding file is a collection of eDP panels from before the generic
14 "edp-panel" compatible was introduced. It is kept around to support old
16 the generic "edp-panel" is if it needed to be used on an eDP controller
17 that doesn't support the generic "edp-panel" compatible, but it should be
18 a strong preference to add the generic "edp-panel" compatible instead.
31 # AUO B116XAK01 eDP TFT LCD panel
51 # InnoLux 13.3" FHD (1920x1080) eDP TFT LCD panel
53 # Innolux P120ZDG-BF1 12.02 inch eDP 2K display panel
[all …]
Dpanel-edp.yaml4 $id: http://devicetree.org/schemas/display/panel/panel-edp.yaml#
7 title: Probeable (via DP AUX / EDID) eDP Panels with simple poweron sequences
13 This binding file can be used to indicate that an eDP panel is connected
26 One piece of information about eDP panels that is typically _not_
29 list eDP panels. We solve that here with two tricks. The "worst case"
35 eDP panels in general can have somewhat arbitrary power sequencing
46 the eDP Standard.
53 eDP -----------+ Black video | Src vid | Blk vid +
89 const: edp-panel
109 hooked up directly to the eDP controller.
[all …]
Dsamsung,atna33xc20.yaml7 title: Samsung 13.3" FHD (1920x1080 pixels) eDP AMOLED panel
18 # Samsung 13.3" FHD (1920x1080 pixels) eDP AMOLED panel
22 # Samsung 14.5" WQXGA+ (2880x1800 pixels) eDP AMOLED panel
24 # Samsung 14.5" 3K (2944x1840 pixels) eDP AMOLED panel
/Documentation/devicetree/bindings/phy/
Dqcom,edp-phy.yaml5 $id: http://devicetree.org/schemas/phy/qcom,edp-phy.yaml#
8 title: Qualcomm eDP PHY
14 The Qualcomm eDP PHY is found in a number of Qualcomm platform and provides
20 - qcom,sc7280-edp-phy
21 - qcom,sc8180x-edp-phy
23 - qcom,sc8280xp-edp-phy
66 compatible = "qcom,sc8180x-edp-phy";
Drockchip,rk3288-dp-phy.yaml36 edp-phy {
Drockchip,rk3588-hdptx-phy.yaml7 title: Rockchip SoC HDMI/eDP Transmitter Combo PHY
/Documentation/devicetree/bindings/display/mediatek/
Dmediatek,dp.yaml14 MediaTek DP and eDP are different hardwares and there are some features
15 which are not supported for eDP. For example, audio is not supported for
16 eDP. Therefore, we need to use two different compatibles to describe them.
25 - mediatek,mt8188-edp-tx
27 - mediatek,mt8195-edp-tx
/Documentation/devicetree/bindings/display/bridge/
Dps8640.yaml7 title: MIPI DSI to eDP Video Format Converter
13 The PS8640 is a low power MIPI-to-eDP video format converter supporting
17 device outputs eDP v1.4, one or two lanes, at a link rate of up to
57 Video port for eDP output (panel or connector).
80 ps8640: edp-bridge@18 {
Dtoshiba,tc358767.yaml7 title: Toshiba TC358767/TC358867/TC9595 DSI/DPI/eDP bridge
14 converts DSI/DPI to eDP/DP .
98 eDP/DP output port. The remote endpoint phandle should be a
99 reference to a valid eDP panel input endpoint node. This port is
140 /* DPI input and eDP output */
146 edp-bridge@68 {
183 edp-bridge@68 {
Danx6345.yaml7 title: Analogix ANX6345 eDP Transmitter
13 The ANX6345 is an ultra-low power Full-HD eDP transmitter designed for
46 Video port for eDP output (panel or connector).
Dnxp,ptn3460.yaml7 title: NXP PTN3460 eDP to LVDS bridge
54 Video port for eDP input
Dti,sn65dsi86.yaml7 title: SN65DSI86 DSI to eDP bridge chip
13 The Texas Instruments SN65DSI86 bridge takes MIPI DSI in and outputs eDP.
89 Video port for eDP output (panel or connector).
Danalogix,dp.yaml32 is used for some eDP screen which don not have a hpd signal.
/Documentation/devicetree/bindings/display/msm/
Ddp-controller.yaml22 - qcom,sc7280-edp
24 - qcom,sc8180x-edp
26 - qcom,sc8280xp-edp
157 # p1 regions is present on DP, but not on eDP
163 - qcom,sc7280-edp
164 - qcom,sc8180x-edp
165 - qcom,sc8280xp-edp
Dqcom,sc7280-mdss.yaml75 "^edp@[0-9a-f]+$":
81 const: qcom,sc7280-edp
91 - qcom,sc7280-edp-phy
276 edp@aea0000 {
277 compatible = "qcom,sc7280-edp";
352 compatible = "qcom,sc7280-edp-phy";
/Documentation/devicetree/bindings/clock/
Dqcom,sc7280-dispcc.yaml30 - description: Link clock from EDP PHY
31 - description: VCO DIV clock from EDP PHY
Dqcom,mmcc.yaml150 - description: eDP phy PLL link clock
151 - description: eDP phy PLL vco clock
189 - description: eDP phy PLL link clock
190 - description: eDP phy PLL vco clock
Dqcom,dispcc-sm8x50.yaml39 - description: Link clock from eDP PHY
40 - description: VCO DIV clock from eDP PHY
/Documentation/gpu/
Dtegra.rst103 longer do and instead provide standard interfaces such as DSI and eDP/DP.
111 the more standard DSI and eDP interfaces.
117 by the versatile SOR output, which supports eDP, DP and HDMI. The SOR is able
128 eDP/DP
131 eDP was first introduced in Tegra124 where it was used to drive the display
/Documentation/devicetree/bindings/display/tegra/
Dnvidia,tegra124-sor.yaml14 The Serial Output Resource (SOR) can be used to drive HDMI, LVDS, eDP
88 description: phandle of a display panel, required for eDP
98 # optional when driving an eDP output
/Documentation/devicetree/bindings/display/
Dallwinner,sun4i-a10-tcon.yaml94 - description: TCON eDP Reset Line
98 - description: TCON eDP Reset Line
111 - const: edp
115 - const: edp
327 - const: edp
345 - const: edp
534 reset-names = "lcd", "edp", "lvds";
Ddp-aux-bus.yaml22 At the moment, this binding only handles the eDP case. It is
/Documentation/devicetree/bindings/thermal/
Dnvidia,tegra124-soctherm.yaml34 - description: EDP interrupt
39 - const: edp
249 interrupt-names = "thermal", "edp";
315 interrupt-names = "thermal", "edp";
/Documentation/devicetree/bindings/arm/tegra/
Dnvidia,tegra186-pmc.yaml108 dsic, dsid, csic, csid, csie, dsif, spi, ufs, dmic-hv, edp,
119 spi, ufs, csig, csih, edp, sdmmc1-hv, sdmmc3-hv, conn,
/Documentation/devicetree/bindings/display/rockchip/
Drockchip,analogix-dp.yaml17 - rockchip,rk3399-edp

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