Searched +full:emc +full:- +full:auto +full:- +full:cal +full:- +full:interval (Results 1 – 2 of 2) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/memory-controllers/nvidia,tegra124-emc.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Thierry Reding <thierry.reding@gmail.com>11 - Jon Hunter <jonathanh@nvidia.com>14 The EMC interfaces with the off-chip SDRAM to service the request stream19 const: nvidia,tegra124-emc26 - description: external memory clock28 clock-names:[all …]
1 # SPDX-License-Identifier: (GPL-2.0)3 ---4 $id: http://devicetree.org/schemas/memory-controllers/nvidia,tegra30-emc.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Dmitry Osipenko <digetx@gmail.com>11 - Jon Hunter <jonathanh@nvidia.com>12 - Thierry Reding <thierry.reding@gmail.com>15 The EMC interfaces with the off-chip SDRAM to service the request stream16 sent from Memory Controller. The EMC also has various performance-affecting18 settings. Tegra30 EMC supports multiple JEDEC standard protocols: LPDDR2,[all …]