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Searched +full:emmc +full:- +full:phy (Results 1 – 8 of 8) sorted by relevance

/Documentation/devicetree/bindings/phy/
Dintel,lgm-emmc-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/intel,lgm-emmc-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Intel Lightning Mountain(LGM) eMMC PHY
10 - Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
13 Bindings for eMMC PHY on Intel's Lightning Mountain SoC, syscon
14 node is used to reference the base address of eMMC phy registers.
16 The eMMC PHY node should be the child of a syscon node with the
19 - compatible: Should be one of the following:
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Drockchip,rk3399-emmc-phy.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/phy/rockchip,rk3399-emmc-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip EMMC PHY
10 - Heiko Stuebner <heiko@sntech.de>
14 const: rockchip,rk3399-emmc-phy
22 clock-names:
25 drive-impedance-ohm:
32 rockchip,enable-strobe-pulldown:
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/Documentation/devicetree/bindings/mmc/
Dmarvell,xenon-sdhci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/marvell,xenon-sdhci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 mmc-controller.yaml and the properties used by the Xenon implementation.
15 sets, clock and PHY.
20 - Ulf Hansson <ulf.hansson@linaro.org>
25 - enum:
26 - marvell,armada-cp110-sdhci
27 - marvell,armada-ap806-sdhci
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Darasan,sdhci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Adrian Hunter <adrian.hunter@intel.com>
13 - $ref: mmc-controller.yaml#
14 - if:
18 const: arasan,sdhci-5.1
21 - phys
22 - phy-names
23 - if:
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Dcdns,sdhci.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cadence SD/SDIO/eMMC Host Controller (SD4HC)
10 - Masahiro Yamada <yamada.masahiro@socionext.com>
15 - enum:
16 - amd,pensando-elba-sd4hc
17 - microchip,mpfs-sd4hc
18 - socionext,uniphier-sd4hc
19 - const: cdns,sd4hc
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Dsdhci-am654.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: http://devicetree.org/schemas/mmc/sdhci-am654.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Ulf Hansson <ulf.hansson@linaro.org>
14 - $ref: sdhci-common.yaml#
19 - enum:
20 - ti,am62-sdhci
21 - ti,am64-sdhci-4bit
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/Documentation/devicetree/bindings/soc/intel/
Dintel,lgm-syscon.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/soc/intel/intel,lgm-syscon.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chuanhua Lei <lchuanhua@maxlinear.com>
11 - Rahul Tanwar <rtanwar@maxlinear.com>
16 - const: intel,lgm-syscon
17 - const: syscon
24 "#address-cells":
27 "#size-cells":
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/Documentation/devicetree/bindings/soc/rockchip/
Dgrf.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Heiko Stuebner <heiko@sntech.de>
15 - items:
16 - enum:
17 - rockchip,rk3288-sgrf
18 - rockchip,rk3566-pipe-grf
19 - rockchip,rk3568-pcie3-phy-grf
20 - rockchip,rk3568-pipe-grf
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