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/Documentation/devicetree/bindings/display/bridge/
Drenesas,lvds.yaml19 - renesas,r8a7742-lvds # for RZ/G1H compatible LVDS encoders
20 - renesas,r8a7743-lvds # for RZ/G1M compatible LVDS encoders
21 - renesas,r8a7744-lvds # for RZ/G1N compatible LVDS encoders
22 - renesas,r8a774a1-lvds # for RZ/G2M compatible LVDS encoders
23 - renesas,r8a774b1-lvds # for RZ/G2N compatible LVDS encoders
24 - renesas,r8a774c0-lvds # for RZ/G2E compatible LVDS encoders
25 - renesas,r8a774e1-lvds # for RZ/G2H compatible LVDS encoders
26 - renesas,r8a7790-lvds # for R-Car H2 compatible LVDS encoders
27 - renesas,r8a7791-lvds # for R-Car M2-W compatible LVDS encoders
28 - renesas,r8a7793-lvds # for R-Car M2-N compatible LVDS encoders
[all …]
Dlvds-codec.yaml7 title: Transparent LVDS encoders and decoders
13 This binding supports transparent LVDS encoders and decoders that don't
57 For LVDS encoders, port 0 is the parallel input
78 For LVDS encoders, port 1 is the LVDS output
Dadi,adv7533.yaml7 title: Analog Devices ADV7533/35 HDMI Encoders
Dadi,adv7511.yaml7 title: Analog Devices ADV7511/11W/13 HDMI Encoders
/Documentation/devicetree/bindings/display/
Damlogic,meson-vpu.yaml20 D | vd2 | VIU | | Video Post | | Video Encoders |<---|-----VCLK |
46 VENC: Video Encoders
49 The VENC is composed of the multiple pixel encoders
Damlogic,meson-dw-hdmi.yaml40 The VENC uses a DVI encoder on top of the ENCI or ENCP encoders to generate
/Documentation/devicetree/bindings/display/ti/
Dti,omap-dss.txt19 a RGB pixel stream to encoders.
27 The DSS Core and the encoders have video port outputs. The structure of the
33 panels or external encoders.
/Documentation/admin-guide/media/
Dintro.rst17 - Media encoders and decoders.
Di2c-cardlist.rst212 Video encoders
223 ak881x AK8813/AK8814 video encoders
224 saa7127 Philips SAA7127/9 digital video encoders
/Documentation/userspace-api/media/v4l/
Dext-ctrls-jpeg.rst9 The JPEG class includes controls for common features of JPEG encoders
83 control is valid only for encoders.
Dvidioc-encoder-cmd.rst58 started yet. Applies to both queues of mem2mem encoders.
63 mem2mem encoders.
67 encoders (as further documented in :ref:`encoder`).
Dvidioc-g-parm.rst43 For stateful encoders (see :ref:`encoder`) this represents the
116 For stateful encoders (see :ref:`encoder`) this represents the
174 For stateful encoders (see :ref:`encoder`) this represents the
Dext-ctrls-codec.rst733 fully parse each NALU. Applicable to the H264 and HEVC encoders.
1190 Applicable to H264 and HEVC encoders. Possible values are:
1216 ignored. Applicable to H264 and HEVC encoders.
1226 ``V4L2_CID_MPEG_VIDEO_H263_MIN_QP``). Applicable to encoders.
1230 H264 encoders.
1336 Applicable to the MPEG1, MPEG2, MPEG4 encoders.
1363 encoders. This is a general, codec-agnostic keyframe control.
1390 it returned together with the first frame. Applicable to encoders.
1668 Applicable to encoders
1719 border pixels. Applicable to encoders.
[all …]
Ddev-decoder.rst51 decoded frames; for encoders, the queue of buffers containing an encoded
85 encoders ``CAPTURE`` buffers must be returned by the encoder in decode order.
91 the order in which frames must be displayed; for encoders, ``OUTPUT``
118 an encoded bytestream; for encoders, the queue of buffers containing raw
139 height in pixels for given source resolution; relevant to encoders only.
144 encoders only.
147 width in pixels for given source resolution; relevant to encoders only.
Dextended-controls.rst20 large and the currently supported hardware MPEG encoders each only
Ddev-encoder.rst261 schedule multiple encoders running in parallel.
322 However, drivers that can schedule multiple encoders based on the
697 This sequence may be also used to change encoding parameters for encoders
Dvidioc-enum-fmt.rst194 compressed formats only. This flag is valid for stateful encoders only.
/Documentation/gpu/
Ddrm-kms.rst66 For the output routing the first step is encoders (represented by
72 Unfortunately encoders have been exposed to userspace, hence can't remove them
75 A CRTC can be connected to multiple encoders, and for an active CRTC there must
80 Abstraction`_). Connectors can have different possible encoders, but the kernel
82 which could switch between an analog and a digital encoder. Encoders can also
136 share code for encoders (sometimes on the same SoC, sometimes off-chip) one or
140 the CRTC and any encoders. Often for drivers with bridges there's no code left
143 backwards compatibility since encoders are exposed to userspace.
Dmeson.rst19 D | vd2 | VIU | | Video Post | | Video Encoders |<---|-----VCLK |
/Documentation/devicetree/bindings/media/
Drockchip,rk3568-vepu.yaml8 title: Hantro G1 VPU encoders implemented on Rockchip SoCs
/Documentation/input/devices/
Drotary-encoder.rst10 Rotary encoders are devices which are connected to the CPU or other
15 Some encoders have both outputs low in stable states, others also have
/Documentation/devicetree/bindings/media/i2c/
Dadv7343.txt3 The ADV7343 are high speed, digital-to-analog video encoders in a 64-lead LQFP
/Documentation/devicetree/bindings/display/mediatek/
Dmediatek,split.yaml15 encoders.
/Documentation/sound/designs/
Dcompress-offload.rst50 may also provide support for a limited number of audio encoders and
105 codecs on a capture stream will return encoders, decoders will be
128 cases decoders will ignore other fields, while encoders will strictly
/Documentation/driver-api/media/drivers/
Dvidtv.rst174 An interface for vidtv encoders. New encoders can be added to this
220 #. Polling encoders in order to fetch 'elapsed_time' worth of data.

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