Searched full:endian (Results 1 – 25 of 225) sorted by relevance
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| /Documentation/devicetree/bindings/regmap/ |
| D | regmap.txt | 5 little-endian,
6 big-endian,
7 native-endian: See common-properties.txt for a definition
10 Regmap defaults to little-endian register access on MMIO based
12 architectures that typically run big-endian operating systems
13 (e.g. PowerPC), registers can be defined as big-endian and must
16 On SoCs that can be operated in both big-endian and little-endian
19 chips), "native-endian" is used to allow using the same device tree
23 Scenario 1 : a register set in big-endian mode.
27 big-endian;
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| /Documentation/netlink/specs/ |
| D | nftables.yaml | 23 byte-order: big-endian
242 byte-order: big-endian
253 byte-order: big-endian
260 byte-order: big-endian
265 byte-order: big-endian
281 byte-order: big-endian
295 byte-order: big-endian
300 byte-order: big-endian
314 byte-order: big-endian
321 byte-order: big-endian
[all …]
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| D | ovs_flow.yaml | 57 byte-order: big-endian
65 byte-order: big-endian
70 byte-order: big-endian
93 byte-order: big-endian
99 byte-order: big-endian
104 byte-order: big-endian
149 byte-order: big-endian
153 byte-order: big-endian
161 byte-order: big-endian
165 byte-order: big-endian
[all …]
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| D | nfsd.yaml | 16 byte-order: big-endian
38 byte-order: big-endian
43 byte-order: big-endian
56 byte-order: big-endian
60 byte-order: big-endian
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| D | tc.yaml | 1101 byte-order: big-endian
1105 byte-order: big-endian
1141 byte-order: big-endian
1154 byte-order: big-endian
1594 byte-order: big-endian
1598 byte-order: big-endian
1608 byte-order: big-endian
1612 byte-order: big-endian
1751 byte-order: big-endian
1923 byte-order: big-endian
[all …]
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| /Documentation/devicetree/bindings/phy/ |
| D | lantiq,vrx200-pcie-phy.yaml | 49 lantiq,rcu-endian-offset:
51 description: the offset of the endian registers for this PHY instance in the RCU syscon
53 lantiq,rcu-big-endian-mask:
55 description: the mask to set the PDI (PHY) registers for this PHY instance to big endian
57 big-endian:
58 description: Configures the PDI (PHY) registers in big-endian mode
61 little-endian:
62 description: Configures the PDI (PHY) registers in big-endian mode
74 - lantiq,rcu-endian-offset
75 - lantiq,rcu-big-endian-mask
[all …]
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| /Documentation/devicetree/bindings/ |
| D | common-properties.txt | 13 - big-endian: Boolean; force big endian register accesses
15 know the peripheral always needs to be accessed in big endian (BE) mode.
16 - little-endian: Boolean; force little endian register accesses
18 peripheral always needs to be accessed in little endian (LE) mode.
19 - native-endian: Boolean; always use register accesses matched to the
27 In such cases, little-endian is the preferred default, but it is not
28 a requirement. Some implementations assume that little-endian is
38 native-endian;
46 big-endian;
54 native-endian;
[all …]
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| /Documentation/devicetree/bindings/display/ |
| D | sm501fb.txt | 19 - little-endian: available on big endian systems, to
20 set different foreign endian.
21 - big-endian: available on little endian systems, to
22 set different foreign endian.
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| D | fsl,dcu.txt | 14 - big-endian Boolean property, LS1021A DCU registers are big-endian.
26 big-endian;
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| /Documentation/devicetree/bindings/i2c/ |
| D | i2c-mux-reg.txt | 18 - little-endian: The existence indicates the register is in little endian.
19 - big-endian: The existence indicates the register is in big endian.
20 If both little-endian and big-endian are omitted, the endianness of the
36 Example of a mux on PCIe card, the host is a powerpc SoC (big endian):
45 little-endian; /* little endian register on PCIe */
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| /Documentation/devicetree/bindings/counter/ |
| D | ftm-quaddec.txt | 10 - big-endian: Access the device registers in big-endian mode.
16 big-endian;
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| /Documentation/devicetree/bindings/usb/ |
| D | generic-ehci.yaml | 111 big-endian:
114 Set this flag for HCDs with big endian descriptors and big
115 endian registers.
117 big-endian-desc:
120 Set this flag for HCDs with big endian descriptors.
122 big-endian-regs:
125 Set this flag for HCDs with big endian registers.
173 big-endian;
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| D | generic-ohci.yaml | 84 big-endian:
87 Set this flag for HCDs with big endian descriptors and big
88 endian registers.
90 big-endian-desc:
93 Set this flag for HCDs with big endian descriptors.
95 big-endian-regs:
98 Set this flag for HCDs with big endian registers.
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| /Documentation/devicetree/bindings/pwm/ |
| D | fsl,vf610-ftm-pwm.yaml | 21 Please see ../regmap/regmap.txt for more detail about how to specify endian
59 big-endian:
63 endian rather than little-endian layout.
91 big-endian;
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| /Documentation/translations/zh_CN/arch/riscv/ |
| D | boot-image-header.rst | 27 u64 text_offset; /* Image load offset, little endian */
28 u64 image_size; /* Effective Image size, little endian */
29 u64 flags; /* kernel flags, little endian */
33 u64 magic = 0x5643534952; /* Magic number, little endian, "RISCV" */
34 u32 magic2 = 0x05435352; /* Magic number 2, little endian, "RSC\x05" */
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| /Documentation/devicetree/bindings/sound/ |
| D | fsl,spdif.yaml | 84 big-endian:
87 If this property is absent, the native endian mode will be in use
88 as default, or the big endian mode will be in use for all the device
89 registers. Set this flag for HCDs with big endian descriptors and big
90 endian registers.
152 big-endian;
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| D | fsl,esai.yaml | 84 big-endian:
87 If this property is absent, the native endian mode
88 will be in use as default, or the big endian mode
117 big-endian;
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| /Documentation/devicetree/bindings/gpio/ |
| D | fsl,qoriq-gpio.yaml | 52 little-endian:
55 GPIO registers are used as little endian. If not
56 present registers are used as big endian by default.
82 little-endian;
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| D | gpio-mmio.yaml | 26 big-endian: true
33 little-endian: true
75 native-endian: true
114 native-endian;
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| /Documentation/devicetree/bindings/rtc/ |
| D | fsl,ls-ftm-alarm.yaml | 47 big-endian:
50 If the host controller is big-endian mode, specify this property.
51 The default endian mode is little-endian.
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| /Documentation/arch/riscv/ |
| D | boot-image-header.rst | 14 u64 text_offset; /* Image load offset, little endian */
15 u64 image_size; /* Effective Image size, little endian */
16 u64 flags; /* kernel flags, little endian */
20 u64 magic = 0x5643534952; /* Magic number, little endian, "RISCV" */
21 u32 magic2 = 0x05435352; /* Magic number 2, little endian, "RSC\x05" */
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| /Documentation/devicetree/bindings/soc/fsl/ |
| D | guts.txt | 28 - little-endian : Indicates that the global utilities block is little
29 endian. The default is big endian.
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| /Documentation/devicetree/bindings/memory-controllers/ |
| D | intel,ixp4xx-expansion-bus-controller.yaml | 35 native-endian:
39 the SoC is running in big-endian or little-endian mode. Thus the
65 - native-endian
79 native-endian;
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| /Documentation/devicetree/bindings/mmc/ |
| D | fsl,esdhc.yaml | 79 little-endian:
82 If the host controller is little-endian mode, specify
83 this property. The default endian mode is big-endian.
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| /Documentation/devicetree/bindings/memory-controllers/fsl/ |
| D | fsl,ddr.yaml | 47 little-endian:
49 Specifies little-endian access to registers. If omitted, big-endian will
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