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/Documentation/devicetree/bindings/net/
Dadi,adin.yaml1 # SPDX-License-Identifier: GPL-2.0+
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandru Tachici <alexandru.tachici@analog.com>
16 - $ref: ethernet-phy.yaml#
19 adi,rx-internal-delay-ps:
22 internal delay (phy-mode is 'rgmii-id' or 'rgmii-rxid') in pico-seconds.
26 adi,tx-internal-delay-ps:
29 internal delay (phy-mode is 'rgmii-id' or 'rgmii-txid') in pico-seconds.
33 adi,fifo-depth-bits:
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Dxlnx,gmii-to-rgmii.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/xlnx,gmii-to-rgmii.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Harini Katakam <harini.katakam@amd.com>
14 Independent Interface (RGMII) core provides the RGMII between RGMII-compliant
24 const: xlnx,gmii-to-rgmii-1.0
31 phy-handle:
32 $ref: ethernet-controller.yaml#/properties/phy-handle
36 - description: 200/375 MHz free-running clock is used as input clock.
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/Documentation/devicetree/bindings/timer/
Dbrcm,bcm2835-system-timer.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timer/brcm,bcm2835-system-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Stefan Wahren <wahrenst@gmx.net>
11 - Raspberry Pi Kernel Maintenance <kernel-list@raspberrypi.com>
14 The System Timer peripheral provides four 32-bit timer channels and a
15 single 64-bit free running counter. Each channel has an output compare
17 free running counter values, and generates an interrupt.
21 const: brcm,bcm2835-system-timer
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Dsnps,archs-gfrc.txt1 Synopsys ARC Free Running 64-bit Global Timer for ARC HS CPUs
2 - clocksource provider for SMP SoC
6 - compatible : should be "snps,archs-gfrc"
7 - clocks : phandle to the source clock
12 compatible = "snps,archs-gfrc";
Dsnps,archs-rtc.txt1 Synopsys ARC Free Running 64-bit Local Timer for ARC HS CPUs
2 - clocksource provider for UP SoC
6 - compatible : should be "snps,archs-rtc"
7 - clocks : phandle to the source clock
12 compatible = "snps,arc-rtc";
Dsamsung,exynos4210-mct.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/timer/samsung,exynos4210-mct.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
14 global timer and CPU local timers. The global timer is a 64-bit free running
15 up-counter and can generate 4 interrupts when the counter reaches one of the
16 four preset counter values. The CPU local timers are 32-bit free running
17 down-counters and generate an interrupt when the counter expires. There is
23 - enum:
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Dti,keystone-timer.txt3 This document provides bindings for the 64-bit timer in the KeyStone
4 architecture devices. The timer can be configured as a general-purpose 64-bit
5 timer, dual general-purpose 32-bit timers. When configured as dual 32-bit
9 It is global timer is a free running up-counter and can generate interrupt
17 - compatible : should be "ti,keystone-timer".
18 - reg : specifies base physical address and count of the registers.
19 - interrupts : interrupt generated by the timer.
20 - clocks : the clock feeding the timer clock.
25 compatible = "ti,keystone-timer";
Dnvidia,tegra-timer.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/timer/nvidia,tegra-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Stephen Warren <swarren@nvidia.com>
13 - if:
17 const: nvidia,tegra210-timer
27 - if:
31 - items:
32 - enum:
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Darm,sp804.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Haojian Zhuang <haojian.zhuang@linaro.org>
14 16 or 32 bit operation and capable of running in one-shot, periodic, or
15 free-running mode. The input clock is shared, but can be gated and prescaled
18 There is a viriant of Arm SP804: Hisilicon 64-bit SP804 timer. Some Hisilicon
27 - arm,sp804
28 - hisilicon,sp804
30 - compatible
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Dti,da830-timer.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timer/ti,da830-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Kousik Sanagavarapu <five231003@gmail.com>
13 This is a 64-bit timer found on TI's DaVinci architecture devices. The timer
14 can be configured as a general-purpose 64-bit timer, dual general-purpose
15 32-bit timers. When configured as dual 32-bit timers, each half can operate
18 The timer is a free running up-counter and can generate interrupts when the
23 const: ti,da830-timer
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Drenesas,ostm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chris Brandt <chris.brandt@renesas.com>
11 - Geert Uytterhoeven <geert+renesas@glider.be>
14 The OSTM is a multi-channel 32-bit timer/counter with fixed clock source that
15 can operate in either interval count down timer or free-running compare match
23 - enum:
24 - renesas,r7s72100-ostm # RZ/A1H
25 - renesas,r7s9210-ostm # RZ/A2M
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/Documentation/device-mapper/
Ddm-bow.txt4 dm_bow is a device mapper driver that uses the free space on a device to back up
6 change, or rolled back by removing the dm_bow device and running a command line
9 dm_bow has three states, set by writing ‘1’ or ‘2’ to /sys/block/dm-?/bow/state.
14 free space on the overlying file system that can be safely used. Typically the
20 the free (trimmed) area as needed in such a way as they can be restored.
25 isn't enough free space, writes are failed with -ENOSPC.
29 becomes a pass-through driver, allowing the device to continue to be used with
34 dm-bow takes one command line parameter, the name of the underlying device.
36 dm-bow will typically be used in the following way. dm-bow will be loaded with a
41 unmounting the file system, removing the dm-bow device and running the command
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/Documentation/admin-guide/mm/damon/
Dreclaim.rst1 .. SPDX-License-Identifier: GPL-2.0
4 DAMON-based Reclamation
7 DAMON-based Reclamation (DAMON_RECLAIM) is a static kernel module that aimed to
9 It doesn't aim to replace the LRU-list based page_granularity reclamation, but
15 On general memory over-committed systems, proactively reclaiming cold pages
20 Free Pages Reporting [3]_ based memory over-commit virtualization systems are
21 good example of the cases. In such systems, the guest VMs reports their free
24 guests could be not so memory-frugal, mainly because some kernel subsystems and
25 user-space applications are designed to use as much memory as available. Then,
26 guests could report only small amount of memory as free to host, results in
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Dlru_sort.rst1 .. SPDX-License-Identifier: GPL-2.0
4 DAMON-based LRU-lists Sorting
7 DAMON-based LRU-lists Sorting (DAMON_LRU_SORT) is a static kernel module that
9 (de)prioritization of pages on their LRU-lists for making LRU-lists a more
12 Where Proactive LRU-lists Sorting is Required?
15 As page-granularity access checking overhead could be significant on huge
23 Because DAMON can identify access patterns of best-effort accuracy while
24 inducing only user-specified range of overhead, proactively running
32 rates that higher than a user-specified threshold) and cold pages (pages of
34 user-specified threshold) using DAMON, and prioritizes hot pages while
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/Documentation/devicetree/bindings/watchdog/
Dmicrochip,pic32-dmt.txt4 malfunction. It is a free-running instruction fetch timer, which is clocked
8 - compatible: must be "microchip,pic32mzda-dmt".
9 - reg: physical base address of the controller and length of memory mapped
11 - clocks: phandle of source clk. Should be <&rootclk PB7CLK>.
16 compatible = "microchip,pic32mzda-dmt";
Dxlnx,xps-timebase-wdt.yaml1 # SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/watchdog/xlnx,xps-timebase-wdt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shubhrajyoti Datta <shubhrajyoti.datta@amd.com>
11 - Srinivas Neeli <srinivas.neeli@amd.com>
14 The Timebase watchdog timer(WDT) is a free-running 32 bit counter.
15 WDT uses a dual-expiration architecture. After one expiration of
22 - $ref: watchdog.yaml#
27 - xlnx,xps-timebase-wdt-1.01.a
[all …]
/Documentation/mm/
Dbalance.rst13 overhead of page reclaim. This may happen for opportunistic high-order
14 allocation requests that have order-0 fallback options. In such cases,
21 is, only when needed (aka zone free memory is 0), instead of making it
28 OTOH, if there is a lot of free dma pages, it is preferable to satisfy
33 _total_ number of free pages fell below 1/64 th of total memory. With the
36 been running production machines of varying memory sizes, and seems to be
42 at init time how many free pages we should aim for while balancing any
49 Another possible solution is that we balance only when the free memory
55 fancy, we could assign different weights to free pages in different
59 it becomes less significant to consider the free dma pages while
[all …]
/Documentation/ABI/testing/
Dsysfs-bus-optee-devices1 What: /sys/bus/tee/devices/optee-ta-<uuid>/
4 Contact: op-tee@lists.trustedfirmware.org
6 OP-TEE bus provides reference to registered drivers under this directory. The <uuid>
8 are free to create needed API under optee-ta-<uuid> directory.
10 What: /sys/bus/tee/devices/optee-ta-<uuid>/need_supplicant
13 Contact: op-tee@lists.trustedfirmware.org
15 Allows to distinguish whether an OP-TEE based TA/device requires user-space
16 tee-supplicant to function properly or not. This attribute will be present for
17 devices which depend on tee-supplicant to be running.
Dsysfs-bus-intel_th-devices-pti1 What: /sys/bus/intel_th/devices/<intel_th_id>-pti/mode
8 What: /sys/bus/intel_th/devices/<intel_th_id>-pti/freerunning_clock
14 free-running clock.
16 What: /sys/bus/intel_th/devices/<intel_th_id>-pti/clock_divider
21 - 0: Intel TH clock rate,
22 - 1: 1/2 Intel TH clock rate,
23 - 2: 1/4 Intel TH clock rate,
24 - 3: 1/8 Intel TH clock rate.
/Documentation/devicetree/bindings/interrupt-controller/
Dmti,gic.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/mti,gic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Paul Burton <paulburton@kernel.org>
11 - Thomas Bogendoerfer <tsbogend@alpha.franken.de>
15 It also supports local (per-processor) interrupts and software-generated
16 interrupts which can be used as IPIs. The GIC also includes a free-running
17 global timer, per-CPU count/compare timers, and a watchdog.
23 "#interrupt-cells":
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/Documentation/driver-api/dmaengine/
Dclient.rst8 ``Documentation/crypto/async-tx-api.rst``
11 Below is a guide to device driver writers on how to use the Slave-DMA API of the
19 - Allocate a DMA slave channel
21 - Set slave and controller specific parameters
23 - Get a descriptor for transaction
25 - Submit the transaction
27 - Issue pending requests and wait for callback notification
40 .. code-block:: c
66 .. code-block:: c
79 DMA-engine are:
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/Documentation/networking/device_drivers/ethernet/dec/
Ddmfe.rst1 .. SPDX-License-Identifier: GPL-2.0
10 This program is free software; you can redistribute it and/or
12 as published by the Free Software Foundation; either version 2
26 dmfe: Davicom DM9xxx net driver, version 1.36.4 (2002-01-17)
51 Now your ethernet card should be up and running.
56 - Implement pci_driver::suspend() and pci_driver::resume() power management methods.
57 - Check on 64 bit boxes.
58 - Check and fix on big endian boxes.
59 - Test and make sure PCI latency is now correct for all cases.
68 - Marcelo Tosatti <marcelo@conectiva.com.br>
[all …]
/Documentation/dev-tools/
Dtesting-overview.rst1 .. SPDX-License-Identifier: GPL-2.0
13 Writing and Running Tests
17 frameworks. These both provide infrastructure to help make running tests and
26 ------------------------------------------
28 KUnit (Documentation/dev-tools/kunit/index.rst) is an entirely in-kernel system
32 KUnit tests therefore are best written against small, self-contained parts
44 Documentation/dev-tools/kunit/style.rst
47 kselftest (Documentation/dev-tools/kselftest.rst), on the other hand, is
62 details. This aligns well with 'system' or 'end-to-end' testing.
72 and for finding corner-cases which are not covered by the appropriate test.
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/Documentation/usb/
Dgadget_serial.rst7 (updated 8-May-2008 for v2.3)
11 ----------------------
12 This program is free software; you can redistribute it and/or
14 published by the Free Software Foundation; either version 2 of
23 License along with this program; if not, write to the Free
25 MA 02111-1307 USA.
35 -------------
55 --------
62 or a generic USB serial driver running on a host PC::
65 --------------------------------------
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/Documentation/timers/
Dno_hz.rst2 NO_HZ: Reducing Scheduling-Clock Ticks
7 reduce the number of scheduling-clock interrupts, thereby improving energy
9 some types of computationally intensive high-performance computing (HPC)
10 applications and for real-time applications.
12 There are three main ways of managing scheduling-clock interrupts
13 (also known as "scheduling-clock ticks" or simply "ticks"):
15 1. Never omit scheduling-clock ticks (CONFIG_HZ_PERIODIC=y or
16 CONFIG_NO_HZ=n for older kernels). You normally will -not-
19 2. Omit scheduling-clock ticks on idle CPUs (CONFIG_NO_HZ_IDLE=y or
23 3. Omit scheduling-clock ticks on CPUs that are either idle or that
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