Searched full:gated (Results 1 – 25 of 38) sorted by relevance
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| /Documentation/devicetree/bindings/clock/ |
| D | st,stm32-rcc.txt | 21 between gated clocks and other clocks and an index specifying the clock to
37 Specifying gated clocks
57 /* Gated clock, AHB1 bit 0 (GPIOA) */
62 /* Gated clock, AHB2 bit 4 (CRYP) */
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| D | maxim,max77686.txt | 11 (gated/ungated) over I2C. Clocks are defined as preprocessor macros in
16 (gated/ungated) over I2C. Clocks are defined as preprocessor macros in
20 (gated/ungated) over I2C. Clocks are defined as preprocessor macros in
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| D | maxim,max9485.txt | 5 - MAX9485_MCLKOUT: A gated, buffered output of the input clock of 27 MHz
8 - MAX9485_CLKOUT[1,2]: Two gated outputs for MAX9485_CLKOUT
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| D | brcm,bcm63xx-clocks.txt | 1 Gated Clock Controller Bindings for MIPS based BCM63XX SoCs
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| D | altr_socfpga.txt | 13 can get gated.
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| D | fsl,sai-clock.yaml | 20 This is a composite of a gated clock and a divider clock.
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| D | vt8500.txt | 33 Gated device clocks:
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| D | mvebu-gated-clock.txt | 1 * Gated Clock bindings for Marvell EBU SoCs
4 peripheral clocks to be gated to save some power. The clock consumer
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| D | st,stm32mp25-rcc.yaml | 41 - description: CK_SCMI_HSE_DIV2 CK_SCMI_HSE divided by 2 (coud be gated)
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| /Documentation/devicetree/bindings/power/ |
| D | apple,pmgr-pwrstate.yaml | 68 0 = power gated, 4 = clock gated, 15 = on.
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| /Documentation/devicetree/bindings/media/ |
| D | cdns,csi2rx.yaml | 30 - description: Gated Register bank clock for APB interface
48 - description: Gated Register bank reset for APB interface
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| /Documentation/arch/arm/sunxi/ |
| D | clocks.rst | 11 A: The 24MHz oscillator allows gating to save power. Indeed, if gated
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| /Documentation/hwmon/ |
| D | pc87427.rst | 38 Fan rotation speeds are reported as 14-bit values from a gated clock
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| D | f71805f.rst | 113 Fan rotation speeds are reported as 12-bit values from a gated clock
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| /Documentation/devicetree/bindings/timer/ |
| D | arm,sp804.yaml | 15 free-running mode. The input clock is shared, but can be gated and prescaled
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| /Documentation/devicetree/bindings/memory-controllers/ |
| D | rockchip,rk3399-dmc.yaml | 100 self-refresh mode. The controller, pi, PHY and DRAM clock will be gated
313 self-refresh mode. The controller, pi, PHY and DRAM clock will be gated
332 sr-mc-gate-idle-dis-freq, the clock will not be gated when idle. See also
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| /Documentation/devicetree/bindings/mfd/ |
| D | maxim,max77686.yaml | 21 (gated/ungated) over I2C. The clock IDs are defined as preprocessor macros
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| D | maxim,max77802.yaml | 22 (gated/ungated) over I2C. The clock IDs are defined as preprocessor macros
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| /Documentation/arch/mips/ |
| D | ingenic-tcu.rst | 19 different clocks (pclk, ext, rtc), gated, and reclocked, through their TCSR register.
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| /Documentation/ABI/testing/ |
| D | sysfs-bus-iio-timer-stm32 | 121 gated:
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| /Documentation/devicetree/bindings/fpga/ |
| D | fpga-region.yaml | 55 branch that may be gated independently.
107 region (PRR0-2) gets its own split of the busses that is independently gated by
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| /Documentation/devicetree/bindings/bus/ |
| D | fsl,imx8qxp-pixel-link-msi-bus.yaml | 64 - description: master gated clock from system
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| /Documentation/arch/arm/samsung/ |
| D | bootloader-interface.rst | 80 modules are power gated, except the TOP modules
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| /Documentation/driver-api/gpio/ |
| D | drivers-on-gpio.rst | 50 - gpio-gate-clock: drivers/clk/clk-gpio.c is used to control a gated clock
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| /Documentation/hid/ |
| D | hid-sensor.rst | 228 By default sensor can be power gated. To enable sysfs attribute "enable" can be
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