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/Documentation/hwmon/
Dmc13783-adc.rst1 Kernel driver mc13783-adc
10 Datasheet: https://www.nxp.com/docs/en/data-sheet/MC13783.pdf
16 Datasheet: https://www.nxp.com/docs/en/data-sheet/MC13892.pdf
22 - Sascha Hauer <s.hauer@pengutronix.de>
23 - Luotao Fu <l.fu@pengutronix.de>
26 -----------
29 Among other things they contain a 10-bit A/D converter. The converter has 16
33 Some channels can be used as General Purpose inputs or in a dedicated mode with
37 the General Purpose inputs and touchscreen.
42 - MC13783:
[all …]
/Documentation/devicetree/bindings/sound/
Dti,tlv320adcx140.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Texas Instruments TLV320ADCX140 Quad Channel Analog-to-Digital Converter
11 - Andrew Davis <afd@ti.com>
14 The TLV320ADCX140 are multichannel (4-ch analog recording or 8-ch digital
15 PDM microphones recording), high-performance audio, analog-to-digital
28 - ti,tlv320adc3140
29 - ti,tlv320adc5140
30 - ti,tlv320adc6140
[all …]
Dti,tlv320adc3xxx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ricard Wanderlof <ricardw@axis.com>
18 - $ref: dai-common.yaml#
23 - ti,tlv320adc3001
24 - ti,tlv320adc3101
30 '#sound-dai-cells':
33 '#gpio-cells':
36 gpio-controller: true
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/Documentation/devicetree/bindings/timer/
Dti,keystone-timer.txt3 This document provides bindings for the 64-bit timer in the KeyStone
4 architecture devices. The timer can be configured as a general-purpose 64-bit
5 timer, dual general-purpose 32-bit timers. When configured as dual 32-bit
9 It is global timer is a free running up-counter and can generate interrupt
17 - compatible : should be "ti,keystone-timer".
18 - reg : specifies base physical address and count of the registers.
19 - interrupts : interrupt generated by the timer.
20 - clocks : the clock feeding the timer clock.
25 compatible = "ti,keystone-timer";
Dti,da830-timer.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timer/ti,da830-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Kousik Sanagavarapu <five231003@gmail.com>
13 This is a 64-bit timer found on TI's DaVinci architecture devices. The timer
14 can be configured as a general-purpose 64-bit timer, dual general-purpose
15 32-bit timers. When configured as dual 32-bit timers, each half can operate
18 The timer is a free running up-counter and can generate interrupts when the
23 const: ti,da830-timer
[all …]
Darm,mps2-timer.txt3 The MPS2 platform has simple general-purpose 32 bits timers.
6 - compatible : Should be "arm,mps2-timer"
7 - reg : Address and length of the register set
8 - interrupts : Reference to the timer interrupt
11 - clocks : The input clock of the timer
12 - clock-frequency : The rate in HZ in input of the ARM MPS2 timer
16 timer1: mps2-timer@40000000 {
17 compatible = "arm,mps2-timer";
23 timer2: mps2-timer@40001000 {
24 compatible = "arm,mps2-timer";
[all …]
/Documentation/devicetree/bindings/mfd/
Dfsl-imx25-tsadc.txt3 This device combines two general purpose conversion queues one used for general
7 - compatible: Should be "fsl,imx25-tsadc".
8 - reg: Start address and size of the memory area of
10 - interrupts: Interrupt for this device
11 (See: ../interrupt-controller/interrupts.txt)
12 - clocks: An 'ipg' clock (See: ../clock/clock-bindings.txt)
13 - interrupt-controller: This device is an interrupt controller. It
16 - #interrupt-cells: Should be '<1>'.
17 - #address-cells: Should be '<1>'.
18 - #size-cells: Should be '<1>'.
[all …]
Datmel-gpbr.txt1 * Device tree bindings for Atmel GPBR (General Purpose Backup Registers)
3 The GPBR are a set of battery-backed registers.
6 - compatible: Should be one of the following:
7 "atmel,at91sam9260-gpbr", "syscon"
8 "microchip,sam9x60-gpbr", "syscon"
9 "microchip,sam9x7-gpbr", "microchip,sam9x60-gpbr", "syscon"
10 - reg: contains offset/length value of the GPBR memory
16 compatible = "atmel,at91sam9260-gpbr", "syscon";
/Documentation/devicetree/bindings/gpio/
Dti,omap-gpio.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/ti,omap-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Grygorii Strashko <grygorii.strashko@ti.com>
13 The general-purpose interface combines general-purpose input/output (GPIO) banks.
14 Each GPIO banks provides up to 32 dedicated general-purpose pins with input
15 and output capabilities; interrupt generation in active mode and wake-up
21 - enum:
22 - ti,omap2-gpio
[all …]
Drockchip,rk3328-grf-gpio.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/gpio/rockchip,rk3328-grf-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip RK3328 General Register Files GPIO controller
10 The Rockchip RK3328 General Register File (GRF) outputs only the
12 for general purpose. It is manipulated by the GRF_SOC_CON10 register.
26 - Heiko Stuebner <heiko@sntech.de>
30 const: rockchip,rk3328-grf-gpio
32 gpio-controller: true
[all …]
Dgpio-grgpio.txt1 Aeroflex Gaisler GRGPIO General Purpose I/O cores.
10 - name : Should be "GAISLER_GPIO" or "01_01a"
12 - reg : Address and length of the register set for the device
14 - interrupts : Interrupt numbers for this device
18 - nbits : The number of gpio lines. If not present driver assumes 32 lines.
20 - irqmap : An array with an index for each gpio line. An index is either a valid
/Documentation/scsi/
DLICENSE.FlashPoint4 Copyright 1995-1996 by Mylex Corporation
10 a) the GNU General Public License as published by the Free Software
15 b) the "BSD-style License" included below.
19 or FITNESS FOR A PARTICULAR PURPOSE. See either the GNU General Public
20 License or the BSD-style License below for more details.
22 You should have received a copy of the GNU General Public License along
26 The BSD-style License is as follows:
37 Copyright 1995-1996 by Mylex Corporation. All Rights Reserved
39 This file is available under both the GNU General Public License
40 and a BSD-style copyright; see LICENSE.FlashPoint for details.
[all …]
/Documentation/devicetree/bindings/soc/imx/
Dfsl,imx-iomuxc-gpr.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx-iomuxc-gpr.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale IOMUX Controller General Purpose Registers
10 - Peng Fan <peng.fan@nxp.com>
13 i.MX Processors have an IOMUXC General Purpose Register group for
19 - items:
20 - enum:
21 - fsl,imx6q-iomuxc-gpr
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/Documentation/devicetree/bindings/watchdog/
Dqcom-wdt.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/watchdog/qcom-wdt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Krait Processor Sub-system (KPSS) Watchdog timer
10 - Rajendra Nayak <quic_rjendra@quicinc.com>
14 pattern: "^(watchdog|timer)@[0-9a-f]+$"
18 - items:
19 - enum:
20 - qcom,kpss-wdt-ipq4019
[all …]
/Documentation/devicetree/bindings/pinctrl/
Dcnxt,cx92755-pinctrl.txt1 Conexant Digicolor CX92755 General Purpose Pin Mapping
11 - compatible: Must be "cnxt,cx92755-pinctrl"
12 - reg: Base address of the General Purpose Pin Mapping register block and the
14 - gpio-controller: Marks the device node as a GPIO controller.
15 - #gpio-cells: Must be <2>. The first cell is the pin number and the
16 second cell is used to specify flags. See include/dt-bindings/gpio/gpio.h
22 compatible = "cnxt,cx92755-pinctrl";
24 gpio-controller;
25 #gpio-cells = <2>;
32 For a general description of GPIO bindings, please refer to ../gpio/gpio.txt.
[all …]
/Documentation/userspace-api/media/drivers/
Dindex.rst1 .. SPDX-License-Identifier: GPL-2.0
5 .. _v4l-drivers_uapi:
8 Video4Linux (V4L) driver-specific documentation
11 **Copyright** |copy| 1999-2016 : LinuxTV Developers
14 under the terms of the GNU General Public License as published by the Free
19 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
29 aspeed-video
30 camera-sensor
32 cx2341x-uapi
34 imx-uapi
[all …]
/Documentation/userspace-api/media/
Dindex.rst1 .. SPDX-License-Identifier: GPL-2.0
14 Documentation/admin-guide/media/index.rst
16 - for usage information about media subsystem and supported drivers;
18 Documentation/driver-api/media/index.rst
20 - for driver development information and Kernel APIs used by
32 mediactl/media-controller
33 cec/cec-api
34 gen-errors
38 fdl-appendix
42 **Copyright** |copy| 2009-2020 : LinuxTV Developers
[all …]
/Documentation/networking/device_drivers/atm/
Dcxacru-cf.py5 # under the terms of the GNU General Public License as published by the Free
11 # FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 # You should have received a copy of the GNU General Public License along with
16 # Temple Place - Suite 330, Boston, MA 02111-1307, USA.
18 # Usage: cxacru-cf.py < cxacru-cf.bin
21 # Warning: cxacru-cf.bin with MD5 hash cdbac2689969d5ed5d4850f117702110
22 # contains mis-aligned values which will stop the modem from being able
/Documentation/driver-api/media/
Dindex.rst1 .. SPDX-License-Identifier: GPL-2.0
14 Documentation/admin-guide/media/index.rst
16 - for usage information about media subsystem and supported drivers;
18 Documentation/userspace-api/media/index.rst
20 - for the userspace APIs used on media devices.
28 maintainer-entry-profile
30 v4l2-core
31 dtv-core
32 rc-core
33 mc-core
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/Documentation/admin-guide/media/
Dindex.rst1 .. SPDX-License-Identifier: GPL-2.0
14 Documentation/userspace-api/media/index.rst
16 - for the userspace APIs used on media devices.
18 Documentation/driver-api/media/index.rst
20 - for driver development information and Kernel APIs used by
31 remote-controller
39 v4l-drivers
40 dvb-drivers
42 **Copyright** |copy| 1999-2020 : LinuxTV Developers
47 under the terms of the GNU General Public License as published by the Free
[all …]
/Documentation/process/
Dmaintainer-handbooks.rst1 .. SPDX-License-Identifier: GPL-2.0
8 The purpose of this document is to provide subsystem specific information
9 which is supplementary to the general development process handbook
18 maintainer-netdev
19 maintainer-soc
20 maintainer-soc-clean-dts
21 maintainer-tip
22 maintainer-kvm-x86
/Documentation/devicetree/bindings/iio/adc/
Ddlg,da9150-gpadc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/dlg,da9150-gpadc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
13 This patch adds support for general purpose ADC within the
14 DA9150 Charger & Fuel-Gauge IC.
18 const: dlg,da9150-gpadc
20 "#io-channel-cells":
24 - compatible
[all …]
/Documentation/devicetree/bindings/regulator/
Dallwinner,sun20i-d1-system-ldos.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/regulator/allwinner,sun20i-d1-system-ldos.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Samuel Holland <samuel@sholland.org>
13 Allwinner D1 contains a pair of general-purpose LDOs which are designed to
20 - allwinner,sun20i-d1-system-ldos
32 - compatible
33 - reg
/Documentation/devicetree/bindings/media/xilinx/
Dxlnx,v-tc.txt2 ------------------------------------
4 The Video Timing Controller is a general purpose video timing generator and
9 - compatible: Must be "xlnx,v-tc-6.1".
11 - reg: Physical base address and length of the registers set for the device.
13 - clocks: Must contain a clock specifier for the VTC core and timing
18 - xlnx,detector: The VTC has a timing detector
19 - xlnx,generator: The VTC has a timing generator
28 compatible = "xlnx,v-tc-6.1";
/Documentation/arch/arm/stm32/
Dstm32mp13-overview.rst6 ------------
8 The STM32MP131/STM32MP133/STM32MP135 are Cortex-A MPU aimed at various applications.
11 - One Cortex-A7 application core
12 - Standard memories interface support
13 - Standard connectivity, widely inherited from the STM32 MCU family
14 - Comprehensive security support
18 - Cortex-A7 core running up to @900MHz
19 - FMC controller to connect SDRAM, NOR and NAND memories
20 - QSPI
21 - SD/MMC/SDIO support
[all …]

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