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/Documentation/devicetree/bindings/interrupt-controller/
Darm,gic.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/arm,gic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marc Zyngier <marc.zyngier@arm.com>
13 ARM SMP cores are often associated with a GIC, providing per processor
17 Primary GIC is attached directly to the CPU and typically has PPIs and SGIs.
22 - $ref: /schemas/interrupt-controller.yaml#
27 - items:
28 - enum:
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