Searched +full:gpio +full:- +full:mux (Results 1 – 25 of 137) sorted by relevance
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| /Documentation/devicetree/bindings/mux/ |
| D | gpio-mux.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/mux/gpio-mux.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: GPIO-based multiplexer controller 10 - Peter Rosin <peda@axentia.se> 13 Define what GPIO pins are used to control a multiplexer. Or several 17 multiplexer GPIO pins, where the first pin is the least significant 22 const: gpio-mux 24 mux-gpios: [all …]
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| D | mux-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/mux/mux-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Peter Rosin <peda@axentia.se> 13 A multiplexer (or mux) controller will have one, or several, consumer devices 14 that uses the mux controller. Thus, a mux controller can possibly control 16 multiplexer needed by each consumer, but a single mux controller can of course 19 A mux controller provides a number of states to its consumers, and the state 20 space is a simple zero-based enumeration. I.e. 0-1 for a 2-way multiplexer, [all …]
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| D | adi,adgs1408.txt | 1 Bindings for Analog Devices ADGS1408/1409 8:1/Dual 4:1 Mux 4 - compatible : Should be one of 7 * Standard mux-controller bindings as described in mux-controller.yaml 10 - gpio-controller : if present, #gpio-cells is required. 11 - #gpio-cells : should be <2> 12 - First cell is the GPO line number, i.e. 0 to 3 14 - Second cell is used to specify active high (0) 18 - idle-state : if present, the state that the mux controller will have 28 * One mux controller. 29 * Mux state set to idle as is (no idle-state declared) [all …]
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| D | adi,adg792a.txt | 4 - compatible : "adi,adg792a" or "adi,adg792g" 5 - #mux-control-cells : <0> if parallel (the three muxes are bound together 6 with a single mux controller controlling all three muxes), or <1> if 7 not (one mux controller for each mux). 8 * Standard mux-controller bindings as described in mux-controller.yaml 11 - gpio-controller : if present, #gpio-cells below is required. 12 - #gpio-cells : should be <2> 13 - First cell is the GPO line number, i.e. 0 or 1 14 - Second cell is used to specify active high (0) 18 - idle-state : if present, array of states that the mux controllers will have [all …]
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| /Documentation/devicetree/bindings/i2c/ |
| D | i2c-mux-gpmux.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/i2c/i2c-mux-gpmux.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: General Purpose I2C Bus Mux 10 - Peter Rosin <peda@axentia.se> 13 This binding describes an I2C bus multiplexer that uses a mux controller 14 from the mux subsystem to route the I2C signals. 16 .-----. .-----. 18 .------------. '-----' '-----' [all …]
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| D | i2c-mux-ltc4306.txt | 5 - compatible: Must contain one of the following. 7 - reg: The I2C address of the device. 11 - Standard I2C mux properties. See i2c-mux.yaml in this directory. 12 - I2C child bus nodes. See i2c-mux.yaml in this directory. 16 - enable-gpios: Reference to the GPIO connected to the enable input. 17 - i2c-mux-idle-disconnect: Boolean; if defined, forces mux to disconnect all 20 - gpio-controller: Marks the device node as a GPIO Controller. 21 - #gpio-cells: Should be two. The first cell is the pin number and 23 See ../gpio/gpio.txt for more information. 24 - ltc,downstream-accelerators-enable: Enables the rise time accelerators [all …]
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| D | i2c-mux.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/i2c/i2c-mux.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Peter Rosin <peda@axentia.se> 18 i2c child busses and other child nodes, the 'i2c-mux' subnode can be used for 19 populating the i2c child busses. If an 'i2c-mux' subnode is present, only 24 pattern: '^(i2c-?)?mux' 26 '#address-cells': 29 '#size-cells': [all …]
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| D | i2c-mux-gpio.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/i2c/i2c-mux-gpio.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: GPIO-based I2C Bus Mux 10 - Wolfram Sang <wsa@kernel.org> 15 +-----+ +-----+ 17 +------------+ +-----+ +-----+ 19 | | /--------+--------+ 20 | +------+ | +------+ child bus A, on GPIO value set to 0 [all …]
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| /Documentation/i2c/muxes/ |
| D | i2c-mux-gpio.rst | 2 Kernel driver i2c-mux-gpio 8 ----------- 10 i2c-mux-gpio is an i2c mux driver providing access to I2C bus segments 11 from a master I2C bus and a hardware MUX controlled through GPIO pins. 15 ---------- ---------- Bus segment 1 - - - - - 16 | | SCL/SDA | |-------------- | | 17 | |------------| | 19 | Linux | GPIO 1..N | MUX |--------------- Devices 20 | |------------| | | | 22 | | | |---------------| | [all …]
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| /Documentation/devicetree/bindings/iio/multiplexer/ |
| D | io-channel-mux.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/iio/multiplexer/io-channel-mux.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Peter Rosin <peda@axentia.se> 16 For each non-empty string in the channels property, an io-channel will be 17 created. The number of this io-channel is the same as the index into the list 18 of strings in the channels property, and also matches the mux controller 19 state. The mux controller state is described in 20 Documentation/devicetree/bindings/mux/mux-controller.yaml [all …]
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| /Documentation/devicetree/bindings/usb/ |
| D | gpio-sbu-mux.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/usb/gpio-sbu-mux.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: GPIO-based SBU mux 10 - Bjorn Andersson <andersson@kernel.org> 13 In USB Type-C applications the SBU lines needs to be connected, disconnected 15 a family of hardware solutions which switches between these modes using GPIO 21 - enum: 22 - nxp,cbdtu02043 [all …]
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| /Documentation/devicetree/bindings/media/ |
| D | video-mux.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/media/video-mux.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sakari Ailus <sakari.ailus@linux.intel.com> 11 - Laurent Pinchart <laurent.pinchart@ideasonboard.com> 20 const: video-mux 22 mux-controls: 25 '#address-cells': 28 '#size-cells': [all …]
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| /Documentation/devicetree/bindings/clock/ |
| D | gpio-mux-clock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/gpio-mux-clock.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Simple GPIO clock multiplexer 10 - Sergej Sawazki <ce3a@gmx.de> 14 const: gpio-mux-clock 18 - description: First parent clock 19 - description: Second parent clock 21 '#clock-cells': [all …]
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | pinctrl-vt8500.txt | 1 VIA VT8500 and Wondermedia WM8xxx-series pinmux/gpio controller 3 These SoCs contain a combined Pinmux/GPIO module. Each pin may operate as 4 either a GPIO in, GPIO out or as an alternate function (I2C, SPI etc). 7 - compatible: "via,vt8500-pinctrl", "wm,wm8505-pinctrl", "wm,wm8650-pinctrl", 8 "wm8750-pinctrl" or "wm,wm8850-pinctrl" 9 - reg: Should contain the physical address of the module's registers. 10 - interrupt-controller: Marks the device node as an interrupt controller. 11 - #interrupt-cells: Should be two. 12 - gpio-controller: Marks the device node as a GPIO controller. 13 - #gpio-cells : Should be two. The first cell is the pin number and the [all …]
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| D | st,stm32-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/pinctrl/st,stm32-pinctrl.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: STM32 GPIO and Pin Mux/Config controller 11 - Alexandre TORGUE <alexandre.torgue@foss.st.com> 14 STMicroelectronics's STM32 MCUs integrate a GPIO and Pin mux/config hardware 17 on-chip controllers onto these pads. 22 - st,stm32f429-pinctrl 23 - st,stm32f469-pinctrl [all …]
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| D | brcm,bcm2835-gpio.txt | 1 Broadcom BCM2835 GPIO (and pinmux) controller 3 The BCM2835 GPIO module is a combined GPIO controller, (GPIO) interrupt 7 - compatible: "brcm,bcm2835-gpio" 8 - compatible: should be one of: 9 "brcm,bcm2835-gpio" - BCM2835 compatible pinctrl 10 "brcm,bcm7211-gpio" - BCM7211 compatible pinctrl 11 "brcm,bcm2711-gpio" - BCM2711 compatible pinctrl 12 "brcm,bcm7211-gpio" - BCM7211 compatible pinctrl 13 - reg: Should contain the physical address of the GPIO module's registers. 14 - gpio-controller: Marks the device node as a GPIO controller. [all …]
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| D | amlogic,meson-pinctrl-a1.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/amlogic,meson-pinctrl-a1.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Neil Armstrong <neil.armstrong@linaro.org> 13 - $ref: amlogic,meson-pinctrl-common.yaml# 18 - amlogic,c3-periphs-pinctrl 19 - amlogic,t7-periphs-pinctrl 20 - amlogic,meson-a1-periphs-pinctrl 21 - amlogic,meson-s4-periphs-pinctrl [all …]
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| D | amlogic,meson-pinctrl-g12a-aobus.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/amlogic,meson-pinctrl-g12a-aobus.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Neil Armstrong <neil.armstrong@linaro.org> 13 - $ref: amlogic,meson-pinctrl-common.yaml# 18 - amlogic,meson-g12a-aobus-pinctrl 21 - compatible 24 "^bank@[0-9a-f]+$": 25 $ref: amlogic,meson-pinctrl-common.yaml#/$defs/meson-gpio [all …]
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| D | amlogic,meson-pinctrl-g12a-periphs.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/amlogic,meson-pinctrl-g12a-periphs.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Neil Armstrong <neil.armstrong@linaro.org> 13 - $ref: amlogic,meson-pinctrl-common.yaml# 18 - amlogic,meson-g12a-periphs-pinctrl 21 - compatible 24 "^bank@[0-9a-f]+$": 25 $ref: amlogic,meson-pinctrl-common.yaml#/$defs/meson-gpio [all …]
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| D | amlogic,meson8-pinctrl-cbus.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/amlogic,meson8-pinctrl-cbus.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Neil Armstrong <neil.armstrong@linaro.org> 13 - $ref: amlogic,meson-pinctrl-common.yaml# 18 - enum: 19 - amlogic,meson8-cbus-pinctrl 20 - amlogic,meson8b-cbus-pinctrl 21 - amlogic,meson-gxbb-periphs-pinctrl [all …]
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| /Documentation/devicetree/bindings/sound/ |
| D | fsl,imx-audio-es8328.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/sound/fsl,imx-audio-es8328.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Shawn Guo <shawnguo@kernel.org> 11 - Sascha Hauer <s.hauer@pengutronix.de> 14 - $ref: sound-card-common.yaml# 18 const: fsl,imx-audio-es8328 22 description: The user-visible name of this sound complex 24 ssi-controller: [all …]
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| /Documentation/devicetree/bindings/net/ |
| D | mdio-mux-gpio.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/net/mdio-mux-gpio.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Properties for an MDIO bus multiplexer/switch controlled by GPIO pins. 10 - Andrew Lunn <andrew@lunn.ch> 13 This is a special case of a MDIO bus multiplexer. One or more GPIO 17 - $ref: /schemas/net/mdio-mux.yaml# 21 const: mdio-mux-gpio 30 - compatible [all …]
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| /Documentation/devicetree/bindings/phy/ |
| D | ti,tcan104x-can.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/ti,tcan104x-can.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Aswath Govindraju <a-govindraju@ti.com> 14 pattern: "^can-phy" 18 - nxp,tjr1443 19 - ti,tcan1042 20 - ti,tcan1043 22 '#phy-cells': [all …]
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| /Documentation/devicetree/bindings/fsi/ |
| D | fsi-master-gpio.txt | 1 Device-tree bindings for gpio-based FSI master driver 2 ----------------------------------------------------- 5 - compatible = "fsi-master-gpio"; 6 - clock-gpios = <gpio-descriptor>; : GPIO for FSI clock 7 - data-gpios = <gpio-descriptor>; : GPIO for FSI data signal 10 - enable-gpios = <gpio-descriptor>; : GPIO for enable signal 11 - trans-gpios = <gpio-descriptor>; : GPIO for voltage translator enable 12 - mux-gpios = <gpio-descriptor>; : GPIO for pin multiplexing with other 14 - no-gpio-delays; : Don't add extra delays between GPIO 16 GPIO block is running at a low enough [all …]
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| /Documentation/devicetree/bindings/spi/ |
| D | spi-mux.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/spi/spi-mux.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 13 setting of the multiplexer to a channel needs to be done by a specific SPI mux 16 MOSI /--------------------------------+--------+--------+--------\ 17 MISO |/------------------------------+|-------+|-------+|-------\| 18 SCL ||/----------------------------+||------+||------+||------\|| 20 +------------+ ||| ||| ||| ||| 21 | SoC ||| | +-+++-+ +-+++-+ +-+++-+ +-+++-+ [all …]
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