Searched full:gpio1 (Results 1 – 25 of 243) sorted by relevance
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | qcom,pmic-gpio.yaml | 443 - gpio1-gpio9 for pm6125 444 - gpio1-gpio10 for pm6150 445 - gpio1-gpio12 for pm6150l 446 - gpio1-gpio9 for pm6350 447 - gpio1-gpio9 for pm6450 448 - gpio1-gpio12 for pm7250b 449 - gpio1-gpio10 for pm7325 450 - gpio1-gpio8 for pm7550ba 451 - gpio1-gpio4 for pm8005 452 - gpio1-gpio6 for pm8018 [all …]
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| D | cirrus,lochnagar.yaml | 81 enum: [ fpga-gpio1, fpga-gpio2, fpga-gpio3, fpga-gpio4, 82 fpga-gpio5, fpga-gpio6, codec-gpio1, codec-gpio2, 84 codec-gpio7, codec-gpio8, dsp-gpio1, dsp-gpio2, 110 psia1-mclk, psia2-mclk, gf-gpio1, gf-gpio5, 116 enum: [ aif, fpga-gpio1, fpga-gpio2, fpga-gpio3, fpga-gpio4, 117 fpga-gpio5, fpga-gpio6, codec-gpio1, codec-gpio2, 119 codec-gpio7, codec-gpio8, dsp-gpio1, dsp-gpio2, 121 gf-gpio2, gf-gpio3, gf-gpio7, gf-gpio1, gf-gpio5,
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| D | semtech,sx1501q.yaml | 143 pattern: '^(gpio[0-9]|gpio1[0-5])$' 179 pattern: '^(oscio|gpio[0-9]|gpio1[0-5])$' 203 gpio1-cfg { 204 pins = "gpio1";
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| D | pinctrl-rk805.txt | 27 - pins: List of pins. Valid values of pins properties are: gpio0, gpio1. 58 pins = "gpio0", "gpio1";
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| /Documentation/devicetree/bindings/gpio/ |
| D | netxbig-gpio-ext.txt | 15 addr-gpios = <&gpio1 15 GPIO_ACTIVE_HIGH 16 &gpio1 16 GPIO_ACTIVE_HIGH 17 &gpio1 17 GPIO_ACTIVE_HIGH>; 18 data-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH 19 &gpio1 13 GPIO_ACTIVE_HIGH 20 &gpio1 14 GPIO_ACTIVE_HIGH>;
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| /Documentation/devicetree/bindings/sound/ |
| D | cirrus,cs35l41.yaml | 86 External Boost must have GPIO1 as GPIO output. GPIO1 will be set high to 90 circuit using combined data from both amplifiers. GPIO1 should be 102 cirrus,gpio1-polarity-invert: 104 Boolean which specifies whether the GPIO1 108 cirrus,gpio1-output-enable: 110 Boolean which specifies whether the GPIO1 pin 115 cirrus,gpio1-src-select: 117 Configures the function of the GPIO1 pin. 143 Note that the options are different from the GPIO1 pin. 177 - cirrus,gpio1-output-enable [all …]
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| D | ti,tlv320adcx140.yaml | 115 Input and Output pin (GPIO1). Its value is a pair, the first value is for 121 1 - GPIO1 is configured as a general-purpose output (GPO) 122 2 - (default) GPIO1 is configured as a device interrupt output (IRQ) 123 3 - GPIO1 is configured as a secondary ASI output (SDOUT2) 124 4 - GPIO1 is configured as a PDM clock output (PDMCLK) 125 8 - GPIO1 is configured as an input to control when MICBIAS turns on or 127 9 - GPIO1 is configured as a general-purpose input (GPI) 128 10 - GPIO1 is configured as a master clock input (MCLK) 129 11 - GPIO1 is configured as an ASI input for daisy-chain (SDIN) 130 12 - GPIO1 is configured as a PDM data input for channel 1 and channel 2 [all …]
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| D | ti,tas27xx.yaml | 73 interrupt-parent = <&gpio1>; 75 reset-gpios = <&gpio1 15 0>; 76 shutdown-gpios = <&gpio1 15 0>;
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| D | ti,tas2770.yaml | 80 interrupt-parent = <&gpio1>; 82 reset-gpio = <&gpio1 15 0>; 83 shutdown-gpios = <&gpio1 14 0>;
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| D | mt2701-cs42448.txt | 11 - i2s1-in-sel-gpio1, i2s1-in-sel-gpio2: Should specify two gpio pins to 41 i2s1-in-sel-gpio1 = <&pio 53 0>;
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| D | asahi-kasei,ak4458.yaml | 70 reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; 71 mute-gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
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| /Documentation/devicetree/bindings/net/ieee802154/ |
| D | cc2520.txt | 27 fifo-gpio = <&gpio1 18 0>; 28 fifop-gpio = <&gpio1 19 0>; 29 sfd-gpio = <&gpio1 13 0>; 30 cca-gpio = <&gpio1 16 0>; 32 reset-gpio = <&gpio1 12 0>;
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| D | ca8210.txt | 23 reset-gpio = <&gpio1 1 GPIO_ACTIVE_HIGH>; 24 irq-gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>;
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| /Documentation/devicetree/bindings/input/touchscreen/ |
| D | egalax-ts.txt | 15 interrupt-parent = <&gpio1>; 17 wakeup-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
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| D | ilitek_ts_i2c.yaml | 70 interrupt-parent = <&gpio1>; 72 reset-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
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| D | goodix.yaml | 77 irq-gpios = <&gpio1 0 0>; 78 reset-gpios = <&gpio1 1 0>;
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| /Documentation/devicetree/bindings/spi/ |
| D | spi-controller.yaml | 36 cs-gpios = <&gpio1 0 0>, <0>, <&gpio1 1 0>, <&gpio1 2 0>; 40 cs0 : &gpio1 0 0 42 cs2 : &gpio1 1 0 43 cs3 : &gpio1 2 0
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| /Documentation/devicetree/bindings/net/can/ |
| D | tcan4x5x.txt | 42 interrupt-parent = <&gpio1>; 45 device-wake-gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>; 46 reset-gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>;
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| /Documentation/devicetree/bindings/mfd/ |
| D | max77620.txt | 34 and power-down delays (sequencing). GPIO1, GPIO2, and GPIO3 can be programmed 46 Each regulator, GPIO1, GPIO2, GPIO3, and 32KHz clock has a flexible power 117 1: Enables POK(Power OK) to control nRST_IO and GPIO1 121 If POK mapping is enabled for GPIO1/nRST_IO then, 122 GPIO1/nRST_IO pins are HIGH only if all rails 125 control) then, GPIO1/nRST_IO goes LOW.
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| /Documentation/devicetree/bindings/pps/ |
| D | pps-gpio.yaml | 45 gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>; 47 echo-gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>;
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| /Documentation/devicetree/bindings/iio/health/ |
| D | ti,afe4404.yaml | 47 interrupt-parent = <&gpio1>; 49 reset-gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
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| D | ti,afe4403.yaml | 51 interrupt-parent = <&gpio1>; 53 reset-gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
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| /Documentation/devicetree/bindings/usb/ |
| D | ti,usb8041.yaml | 57 reset-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; 65 reset-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
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| /Documentation/devicetree/bindings/display/panel/ |
| D | mantix,mlaf057we51-x.yaml | 70 reset-gpios = <&gpio1 29 GPIO_ACTIVE_LOW>; 71 mantix,tp-rstn-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
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| D | sharp,ls037v7dw01.yaml | 58 &gpio1 2 GPIO_ACTIVE_HIGH /* gpio2, lcd LR */ 59 &gpio1 3 GPIO_ACTIVE_HIGH>; /* gpio3, lcd UD */
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