Searched full:gpr (Results 1 – 22 of 22) sorted by relevance
| /Documentation/devicetree/bindings/soc/imx/ |
| D | fsl,imx-iomuxc-gpr.yaml | 4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx-iomuxc-gpr.yaml#
21 - fsl,imx6q-iomuxc-gpr
22 - fsl,imx8mq-iomuxc-gpr
27 - fsl,imx6sl-iomuxc-gpr
28 - fsl,imx6sll-iomuxc-gpr
29 - fsl,imx6ul-iomuxc-gpr
30 - const: fsl,imx6q-iomuxc-gpr
34 - fsl,imx6sx-iomuxc-gpr
35 - fsl,imx7d-iomuxc-gpr
36 - const: fsl,imx6q-iomuxc-gpr
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| /Documentation/devicetree/bindings/soc/qcom/ |
| D | qcom,apr.yaml | 7 title: Qualcomm APR/GPR (Asynchronous/Generic Packet Router)
13 This binding describes the Qualcomm APR/GPR, APR/GPR is a IPC protocol for
14 communication between Application processor and QDSP. APR/GPR is mainly
22 - qcom,gpr
54 Selects the processor domain for gpr
97 APR/GPR static port services.
118 - qcom,gpr
186 #include <dt-bindings/soc/qcom,gpr.h>
187 gpr {
188 compatible = "qcom,gpr";
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| D | qcom,apr-services.yaml | 7 title: Qualcomm APR/GPR services shared parts
13 Common parts of a static service in Qualcomm APR/GPR (Asynchronous/Generic
33 GPR Service ID
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| /Documentation/devicetree/bindings/media/ |
| D | nxp,imx8mq-mipi-csi2.yaml | 50 fsl,mipi-phy-gpr:
52 The phandle to the imx8mq syscon iomux-gpr with the register
56 <gpr req_gpr>
57 gpr is the phandle to general purpose register node.
58 req_gpr is the gpr register offset of RX_ENABLE for the mipi phy.
62 - description: The 'gpr' is the phandle to general purpose register node.
63 - description: The 'req_gpr' is the gpr register offset containing
116 - fsl,mipi-phy-gpr
145 fsl,mipi-phy-gpr = <&iomuxc_gpr 0x88>;
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| /Documentation/devicetree/bindings/sound/ |
| D | fsl,mqs.yaml | 37 gpr:
39 description: The phandle to the General Purpose Register (GPR) node
85 - gpr
94 gpr = <&gpr>;
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| D | qcom,q6prm.yaml | 34 #include <dt-bindings/soc/qcom,gpr.h>
36 gpr {
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| D | qcom,q6apm.yaml | 46 #include <dt-bindings/soc/qcom,gpr.h>
48 gpr {
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| /Documentation/devicetree/bindings/display/imx/ |
| D | fsl,imx6-hdmi.yaml | 34 gpr:
37 phandle to the iomuxc-gpr region containing the HDMI multiplexer control
78 - gpr
91 gpr = <&gpr>;
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| D | ldb.txt | 16 - gpr : should be <&gpr> on i.MX53 and i.MX6q.
17 The phandle points to the iomuxc-gpr region containing the LVDS
75 gpr: iomuxc-gpr@53fa8000 {
83 gpr = <&gpr>;
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| /Documentation/devicetree/bindings/remoteproc/ |
| D | qcom,glink-edge.yaml | 31 gpr:
36 Qualcomm GPR (Generic Packet Router)
67 gpr: false
71 - gpr
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| D | fsl,imx-rproc.yaml | 76 fsl,iomuxc-gpr:
79 Phandle to IOMUXC GPR block which provide access to CM7 CPUWAIT bit.
101 fsl,iomuxc-gpr: false
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| D | qcom,smd-edge.yaml | 31 Qualcomm APR/GPR (Asynchronous/Generic Packet Router)
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| D | qcom,sc7280-adsp-pil.yaml | 115 gpr: true
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| /Documentation/devicetree/bindings/net/can/ |
| D | fsl,flexcan.yaml | 90 <gpr req_gpr req_bit>
91 gpr is the phandle to general purpose register node.
92 req_gpr is the gpr register offset of CAN stop request.
97 - description: The 'gpr' is the phandle to general purpose register node.
98 - description: The 'req_gpr' is the gpr register offset of CAN stop request.
160 fsl,stop-mode = <&gpr 0x34 28>;
173 fsl,stop-mode = <&gpr 0x34 28>;
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| /Documentation/devicetree/bindings/net/ |
| D | nxp,dwmac-imx.yaml | 63 - description: phandle to the GPR syscon
64 - description: the offset of the GPR register
67 encompases the GPR register, and the offset of the GPR register.
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| D | fsl,fec.yaml | 181 - description: the gpr register offset for ENET stop request
182 - description: the gpr bit offset for ENET stop request
184 Register bits of stop mode control, the format is <&gpr req_gpr req_bit>.
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| /Documentation/devicetree/bindings/dma/ |
| D | fsl,imx-sdma.yaml | 105 gpr:
107 description: The phandle to the General Purpose Register (GPR) node
114 - description: GPR register offset
115 - description: GPR register shift
116 - description: GPR register value
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| /Documentation/devicetree/bindings/memory-controllers/fsl/ |
| D | fsl,imx-weim.yaml | 59 fsl,weim-cs-gpr:
63 WEIM CS GPR register, e.g. IOMUXC_GPR1 on i.MX6Q. IOMUXC_GPR1[11:0]
117 fsl,weim-cs-gpr: false
190 fsl,weim-cs-gpr = <&gpr>;
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | fsl,imx27-pinctrl.txt | 24 Registers: GIUS (GPIO In Use), GPR (General Purpose Register)
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| /Documentation/arch/powerpc/ |
| D | kvm-nested.rst | 371 specific L2 vCPU (eg. GPR state). Only L2 VCPU state maybe be set by
454 | 0x1000-| 0x08 | RW | T | GPR 0-31 |
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| /Documentation/trace/ |
| D | ftrace.rst | 2836 type is smaller than a GPR, it is the responsibility of the consumer
2839 when using a u8 in a 64-bit GPR, bits [63:8] may contain arbitrary values,
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| /Documentation/virt/kvm/ |
| D | api.rst | 432 __u64 gpr[32];
441 unsigned long gpr[32];
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