Searched +full:hardware +full:- +full:driven (Results 1 – 25 of 66) sorted by relevance
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| /Documentation/driver-api/gpio/ |
| D | intro.rst | 17 A "General Purpose Input/Output" (GPIO) is a flexible software-controlled
19 to Linux developers working with embedded and custom hardware. Each GPIO
21 (BGA) packages. Board schematics show which external hardware connects to
25 System-on-Chip (SOC) processors heavily rely on GPIOs. In some cases, every
26 non-dedicated pin can be configured as a GPIO; and most chips have at least
31 Most PC southbridges have a few dozen GPIO-capable pins (with only the BIOS
36 - Output values are writable (high=1, low=0). Some chips also have
37 options about how that value is driven, so that for example only one
38 value might be driven, supporting "wire-OR" and similar schemes for the
41 - Input values are likewise readable (1, 0). Some chips support readback
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| D | driver.rst | 24 Inside a GPIO driver, individual GPIO lines are identified by their hardware
26 between 0 and n-1, n being the number of GPIOs managed by the chip.
28 The hardware GPIO number should be something intuitive to the hardware, for
29 example if a system uses a memory-mapped set of I/O-registers where 32 GPIO
30 lines are handled by one bit per line in a 32-bit register, it makes sense to
31 use hardware offsets 0..31 for these, corresponding to bits 0..31 in the
34 This number is purely internal: the hardware number of a particular GPIO
40 assigned), and for each GPIO line the global number will be (base + hardware
44 So for example one platform could use global numbers 32-159 for GPIOs, with a
46 global numbers 0..63 with one set of GPIO controllers, 64-79 with another type
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | renesas,rza1-ports.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/renesas,rza1-ports.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jacopo Mondi <jacopo+renesas@jmondi.org>
11 - Geert Uytterhoeven <geert+renesas@glider.be>
15 controller, named "Ports" in the hardware reference manual.
16 Pin multiplexing and GPIO configuration is performed on a per-pin basis
17 writing configuration values to per-port register sets.
25 - const: renesas,r7s72100-ports # RZ/A1H
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| D | pinctrl-st.txt | 3 Each multi-function pin is controlled, driven and routed through the
5 and multiple alternate functions(ALT1 - ALTx) that directly connect
6 the pin to different hardware blocks.
9 Pull Up (PU) are driven by the related PIO block.
14 GPIO bank can have one of the two possible types of interrupt-wirings.
20 | |----> [gpio-bank (n) ]
21 | |----> [gpio-bank (n + 1)]
22 [irqN]-- | irq-mux |----> [gpio-bank (n + 2)]
23 | |----> [gpio-bank (... )]
24 |_________|----> [gpio-bank (n + 7)]
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| /Documentation/devicetree/bindings/mfd/ |
| D | st,stm32-timers.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/st,stm32-timers.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 This hardware block provides 3 types of timer along with PWM functionality:
11 - advanced-control timers consist of a 16-bit auto-reload counter driven
14 - general-purpose timers consist of a 16-bit or 32-bit auto-reload counter
15 driven by a programmable prescaler and PWM outputs.
16 - basic timers consist of a 16-bit auto-reload counter driven by a
20 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
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| /Documentation/driver-api/thermal/ |
| D | nouveau_thermal.rst | 12 -----------
17 Currently, due to the absence of in-kernel API to access HWMON drivers, Nouveau
24 ----------------------
26 Temperature is exposed under as a read-only HWMON attribute temp1_input.
56 --------------
75 Your fan can be driven in different modes:
78 * 1: The fan can be driven in manual (use pwm1 to change the speed);
79 * 2; The fan is driven automatically depending on the temperature.
85 When operating in manual mode outside the vbios-defined
87 depending on your hardware.
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| /Documentation/admin-guide/ |
| D | parport.rst | 4 The ``parport`` code provides parallel-port support under Linux. This
9 detection of your hardware. This is particularly useful if you want
16 port-sharing) and architecture-dependent (which deals with actually
28 architecture-dependent code with (for example)::
32 to tell the ``parport`` code that you want three PC-style ports, one at
34 auto-detected IRQ. Currently, PC-style (``parport_pc``), Sun ``bpp``,
35 Amiga, Atari, and MFC3 hardware is supported.
43 --------
60 ------------------------
68 parport0: Printer, BJC-210 (Canon)
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| /Documentation/leds/ |
| D | leds-class.rst | 8 of the LED (taking a value 0-max_brightness). Most LEDs don't have hardware
9 brightness support so will just be turned on for non-zero brightness settings.
14 existing subsystems with minimal additional code. Examples are the disk-activity,
15 nand-disk and sharpsl-charge triggers. With led triggers disabled, the code
48 - devicename:
51 than to the hardware; the information related to the product and the bus
57 - color:
59 include/dt-bindings/leds/common.h.
61 - function:
63 include/dt-bindings/leds/common.h.
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| /Documentation/devicetree/bindings/interconnect/ |
| D | qcom,rpm-common.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interconnect/qcom,rpm-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm RPMh Network-On-Chip Interconnect
10 - Konrad Dybcio <konradybcio@kernel.org>
15 the bus monitor hardware. Each provider node represents a NoC bus master,
16 driven by a dedicated clock source.
19 '#interconnect-cells':
21 - const: 2
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| /Documentation/devicetree/bindings/nvmem/ |
| D | nvmem.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
13 This binding is intended to represent the location of hardware
23 "#address-cells":
26 "#size-cells":
29 read-only:
34 wp-gpios:
36 GPIO to which the write-protect pin of the chip is connected.
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| /Documentation/trace/coresight/ |
| D | coresight-trbe.rst | 1 .. SPDX-License-Identifier: GPL-2.0
10 Hardware Description
11 --------------------
13 Trace Buffer Extension (TRBE) is a percpu hardware which captures in system
19 driven via the CoreSight driver framework to support the ETE (which is
23 ---------------------------
36 *Key file items are:-*
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| /Documentation/spi/ |
| D | spi-lm70llp.rst | 2 spi_lm70llp : LM70-LLP parport-to-SPI adapter
15 -----------
22 into a SPI bus with a single device, which will be driven by the generic
26 Hardware Interfacing
27 --------------------
28 The schematic for this particular board (the LM70EVAL-LLP) is
33 The hardware interfacing on the LM70 LLP eval board is as follows:
39 D0 2 - -
40 D1 3 --> V+ 5
41 D2 4 --> V+ 5
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| /Documentation/devicetree/bindings/hwmon/ |
| D | sensirion,shtc1.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Christopher Ruehl chris.ruehl@gtsys.com.hk
14 designed especially for battery-driven high-volume consumer electronics
18 This binding document describes the binding for the hardware monitor
24 - sensirion,shtc1
25 - sensirion,shtw1
26 - sensirion,shtc3
31 sensirion,blocking-io:
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| /Documentation/devicetree/bindings/display/ |
| D | dsi-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/dsi-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
26 reg-property set to the virtual channel number, usually there is just
33 clock-master:
37 another DSI host to drive the same peripheral. Hardware supporting
39 to be driven by the same clock. Only the DSI host instance
42 "#address-cells":
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| /Documentation/userspace-api/media/dvb/ |
| D | dmx-get-stc.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
11 ----
16 --------
23 ---------
32 -----------
35 (which is driven by a PES filter of type :c:type:`DMX_PES_PCR <dmx_ts_pes>`).
36 Some hardware supports more than one STC, so you must specify which one by
40 ``stc->stc / stc->base``.
43 ------------
47 On error -1 is returned, and the ``errno`` variable is set
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| /Documentation/devicetree/bindings/leds/ |
| D | leds-lgm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/leds/leds-lgm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Zhu, Yi Xin <Yixin.zhu@intel.com>
11 - Amireddy Mallikarjuna reddy <mallikarjunax.reddy@intel.com>
15 const: intel,lgm-ssoled
23 clock-names:
25 - const: sso
26 - const: fpid
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| /Documentation/devicetree/bindings/soc/qcom/ |
| D | qcom,rpm-master-stats.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/qcom/qcom,rpm-master-stats.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Konrad Dybcio <konradybcio@kernel.org>
16 (particularly around entering hardware-driven low power modes: XO shutdown
17 and total system-wide power collapse) are first made at Master-level, and
21 our device has entered the desired low-power mode, how long it took to do so,
26 This scheme has been used on various SoCs in the 2013-2023 era, with some
27 newer or higher-end designs providing this information through an SMEM query.
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| /Documentation/userspace-api/gpio/ |
| D | gpio-get-linehandle-ioctl.rst | 1 .. SPDX-License-Identifier: GPL-2.0
11 gpio-v2-get-line-ioctl.rst.
16 GPIO_GET_LINEHANDLE_IOCTL - Request a line or lines from the kernel.
55 .. _gpio-get-linehandle-config-rules:
58 -------------------
65 line is requested "as-is" to allow reading of the line value without altering
71 If none are set then the line is assumed push-pull.
80 .. _gpio-get-linehandle-config-support:
83 ---------------------
86 hardware and driver, the kernel applies one of these approaches:
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| D | gpio-v2-get-line-ioctl.rst | 1 .. SPDX-License-Identifier: GPL-2.0
12 GPIO_V2_GET_LINE_IOCTL - Request a line or lines from the kernel.
37 :ref:`gpio-v2-line-request`.
41 as possible. e.g. gpio-v2-line-get-values-ioctl.rst will read all the
53 .. _gpio-v2-get-line-config-rules:
56 -------------------
63 and the line is requested "as-is" to allow reading of the line value
69 If none are set then the line is assumed push-pull.
82 The ``GPIO_V2_LINE_FLAG_EVENT_CLOCK_HTE`` flag requires supporting hardware
88 applies to both the values returned by gpio-v2-line-get-values-ioctl.rst and
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| /Documentation/arch/arm64/ |
| D | arm-acpi.rst | 12 The Arm kernel implements the reduced hardware model of ACPI version
20 specifications, then ACPI may not be a good fit for the hardware.
23 industry-standard Arm systems, they also apply to more than one operating
25 ACPI and Linux only, on an Arm system -- that is, what Linux expects of
30 ----------------
33 exist in Linux for describing non-enumerable hardware, after all. In this
40 - ACPI’s byte code (AML) allows the platform to encode hardware behavior,
41 while DT explicitly does not support this. For hardware vendors, being
43 system releases on new hardware.
45 - ACPI’s OSPM defines a power management model that constrains what the
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| /Documentation/devicetree/bindings/gpio/ |
| D | gpio-stp-xway.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/gpio-stp-xway.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 3 groups of 8 bits can be driven. The hardware is able to allow the DSL modem
16 - John Crispin <john@phrozen.org>
20 pattern: "^gpio@[0-9a-f]+$"
23 const: lantiq,gpio-stp-xway
28 gpio-controller: true
30 "#gpio-cells":
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| /Documentation/timers/ |
| D | highres.rst | 8 https://www.kernel.org/doc/ols/2006/ols2006v1-pages-333-346.pdf
11 http://www.cs.columbia.edu/~nahum/w6998/papers/ols2006-hrtimers-slides.pdf
23 - hrtimer base infrastructure
24 - timeofday and clock source management
25 - clock event management
26 - high resolution timer functionality
27 - dynamic ticks
31 ---------------------------
40 - time ordered enqueueing into a rb-tree
41 - independent of ticks (the processing is based on nanoseconds)
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| /Documentation/driver-api/ |
| D | s390-drivers.rst | 12 for interaction with the hardware and interfaces for interacting with
19 Operation", IBM publication no. SA22-7832.
21 While most I/O devices on a s390 system are typically driven through the
30 Documentation/arch/s390/driver-model.rst.
40 * I/O subchannels bound to the vfio-ccw driver. See
41 Documentation/arch/s390/vfio-ccw.rst.
53 so-called channel attached devices. They are addressed via I/O
55 channel-attached devices, however, will never interact with the
59 I/O functions for channel-attached devices
60 ------------------------------------------
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| /Documentation/i2c/ |
| D | gpio-fault-injection.rst | 7 which is driven by the I2C bus master driver under test. The GPIO fault
12 'i2c-fault-injector' subdirectory in the Kernel debugfs filesystem, usually
14 driven I2C bus. Each subdirectory will contain files to trigger the fault
15 injection. They will be described now along with their intended use-cases.
21 -----
31 -----
52 in a bus master driver, make sure you checked your hardware setup for such
56 --------------------------
68 -----------------------
90 bus arbitration against another master in a multi-master setup.
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| /Documentation/driver-api/media/ |
| D | cec-core.rst | 1 .. SPDX-License-Identifier: GPL-2.0
7 hardware. It is designed to handle a multiple types of hardware (receivers,
15 ----------------
33 ---------------------
35 The struct cec_adapter represents the CEC adapter hardware. It is created by
53 will be stored in adap->priv and can be used by the adapter ops.
61 capabilities of the hardware and which parts are to be handled
95 Implementing the Low-Level CEC Adapter
96 --------------------------------------
98 The following low-level adapter operations have to be implemented in
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