Searched full:have (Results 1 – 25 of 2021) sorted by relevance
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| /Documentation/networking/devlink/ |
| D | prestera.rst | 69 - Traps packets that have no specific IP interface (IP to me) and no forwarding prefix
72 - Traps packets that have been send to one of switch IP interfaces addresses
78 - Traps ARP replies packets that have switch-port's DA Mac address
81 - Traps packets that have ACL priority set to 0 (tc pref 0)
84 - Traps packets that have ACL priority set to 1 (tc pref 1)
87 - Traps packets that have ACL priority set to 2 (tc pref 2)
90 - Traps packets that have ACL priority set to 3 (tc pref 3)
93 - Traps packets that have ACL priority set to 4 (tc pref 4)
96 - Traps packets that have ACL priority set to 5 (tc pref 5)
99 - Traps packets that have ACL priority set to 6 (tc pref 6)
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| /Documentation/input/devices/ |
| D | cs461x.rst | 9 This version does not have cooked mode support; the basic code
10 is present here, but have not tested completely. The button analysis
19 The sensitivity and calibrate quality have not been tested; the two
21 screen in VJOYD); I have no documentation on my chip; and the existing
23 So the driver have no code to perform hardware related calibration.
25 This driver have the basic support for PCI devices only; there is no
30 There are no sound or input collisions detected. The source code have
36 There are no debug information print have been placed in source, and no
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| /Documentation/filesystems/ |
| D | directory-locking.rst | 56 * if the parents don't have a common ancestor, fail the operation.
74 operations on directory trees, but we obviously do not have the full
75 picture of those - especially for network filesystems. What we have
86 For a lot of reasons we want to have the same directory present in dcache
106 if two dentries have been found to have a common ancestor after taking
111 parents have a common ancestor.
149 For example, if we have NFS filesystem caching on a local one, we have
174 In other words, we have a cycle of threads, T1,..., Tn,
185 Each operation in the minimal cycle must have locked at least
193 we would have Dn a parent of D1, which is a parent of D2, which is
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| /Documentation/driver-api/pm/ |
| D | notifiers.rst | 37 error occurred during hibernation. Device restore callbacks have been
38 executed and tasks have been thawed.
47 callbacks have been executed and tasks have been thawed.
54 resume callbacks have been executed and tasks have been thawed.
62 ``PM_SUSPEND_PREPARE`` event, the notifiers that have already succeeded for that
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| /Documentation/usb/ |
| D | gadget_multi.rst | 18 have two configurations -- one with RNDIS and another with CDC ECM[3].
45 For the gadget to work under Windows two conditions have to be met:
51 gadget which on its own have some conditions[4]. If they are met,
56 The good news is: you do not have to worry about most of the
59 The only thing to worry is that the gadget has to have a single
97 functionality. As an effect provided INFs won't work since they have
107 things don't work as intended before realising Windows have cached
114 Provided INF files have been tested on Windows XP SP3, Windows Vista
122 At this moment, drivers for any other systems have not been tested.
124 believed that it should (read: "I have no idea whether it will") work
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| /Documentation/arch/x86/i386/ |
| D | IO-APIC.rst | 9 Most (all) Intel-MP compliant SMP boards have the so-called 'IO-APIC',
83 to have non shared interrupts). Slot5 should be used for videocards, they
86 so if you have your SCSI card (IRQ11) in Slot1, Tulip card (IRQ9) in
87 Slot2, then you'll have to specify this pirq= line::
96 note that this script won't work if you have skipped a few slots or if your
98 connected in some strange way). E.g. if in the above case you have your SCSI
99 card (IRQ11) in Slot3, and have Slot1 empty::
111 If you have 2 PCI buses, then you can use up to 8 pirq values, although such
112 boards tend to have a good configuration.
121 linux-kernel@vger.kernel.org if you have any problems that are not covered
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| /Documentation/accel/ |
| D | introduction.rst | 25 have on-board DRAM (to hold the DL topology), DMA engines and
27 It might also have an MMU to manage multiple users and might also enable
29 addition, these devices will usually have some tools, such as profiler and
33 have more computational power and memory b/w (e.g. HBM) and will likely have
37 All these devices typically have different runtime user-space software stacks,
46 Because this type of devices can be an IP inside GPUs or have similar
53 collaborate with DRM developers that have experience with this type of
68 261 major number and will have the following convention:
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| /Documentation/devicetree/bindings/memory-controllers/ti/ |
| D | emif.txt | 39 - cs1-used : Have this property if CS1 of this EMIF
44 - cal-resistor-per-cs : Have this property if the board has one
47 - hw-caps-read-idle-ctrl: Have this property if the controller
50 - hw-caps-dll-calib-ctrl: Have this property if the controller
53 - hw-caps-ll-interface : Have this property if the controller
56 - hw-caps-temp-alert : Have this property if the controller
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| /Documentation/process/ |
| D | botching-up-ioctls.rst | 27 First the prerequisites. Without these you have already failed, because you
58 will have a second iteration or at least an extension for any given interface.
60 * Have a clear way for userspace to figure out whether your new ioctl or ioctl
65 * Have a plan for extending ioctls with new flags or new fields at the end of
81 * Have simple testcases for all of the above.
87 Nowadays we don't have any excuse left any more for drm drivers being neat
99 * Have simple testcases for every input validation failure case in your ioctl.
119 still too tricky have a timeout or hangcheck safety net as a last-ditch
122 * Have testcases for the really tricky corner cases in your error recovery code
130 GPUs do most everything asynchronously, so we have a need to time operations and
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| D | 6.Followthrough.rst | 6 At this point, you have followed the guidelines given so far and, with the
7 addition of your own engineering skills, have posted a perfect series of
31 - If you have explained your patch well, reviewers will understand its
69 Note that you do not have to agree with every change suggested by
71 explain what is really going on. If you have a technical objection to a
94 place for this kind of information. Reviewers should not have to search
107 though, and not before all other alternatives have been explored. And bear
115 most of the review issues have been resolved, the next step is usually
147 complete (and you have added yourself to the MAINTAINERS file), though, it
155 though; you still need to be responsive to developers who have questions or
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| /Documentation/block/ |
| D | biovecs.rst | 8 Instead, we have a new struct bvec_iter which represents a range of a biovec -
18 bi_size and bi_idx have been moved there; and instead of modifying bv_offset
24 normal code doesn't have to deal with bi_bvec_done.
26 * Driver code should no longer refer to biovecs directly; we now have
58 The new code is much more straightforward - have a look. This sort of
90 since all drivers _must_ go through the bvec iterator - and have been
98 where previously you would have used bi_idx you'd now use a bvec_iter,
110 biovec, in order to calculate bi_vcnt for the new bio we'd have to iterate
118 more importantly stacked drivers don't have to deal with both their own bio
126 * The following helpers whose names have the suffix of `_all` can only be used
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| /Documentation/admin-guide/blockdev/ |
| D | floppy.rst | 20 at the lilo boot prompt (if you have a thinkpad)::
65 Tells the floppy driver that you have a well behaved floppy controller.
74 Tells the floppy driver that you have only one floppy controller.
78 Tells the floppy driver that you have two floppy controllers.
84 Tells the floppy driver that you have a Thinkpad. Thinkpads use an
88 Tells the floppy driver that you don't have a Thinkpad.
92 This is needed on HP Omnibooks, which don't have a workable
98 you have an FDC without a FIFO (8272A or 82072). 82072A and
104 If you have a FIFO-able FDC, the floppy driver automatically
145 you have more than two floppy drives (only two can be
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| /Documentation/networking/ |
| D | xfrm_sync.rst | 17 We already have the ability to generate SA add/del/upd events.
18 These patches add ability to sync and have accurate lifetime byte (to
27 know if the replay sequence threshold is reached or 10 secs have passed"
47 A XFRM_MSG_GETAE does not have TLVs.
49 A XFRM_MSG_NEWAE will have at least two TLVs (as is
140 The response will always have XFRMA_LTIME_VAL and XFRMA_REPLAY_VAL TLVs.
160 The response will always have XFRMA_LTIME_VAL and XFRMA_REPLAY_VAL TLVs.
169 The message will always have XFRMA_LTIME_VAL and XFRMA_REPLAY_VAL TLVs.
177 The message will always have XFRMA_LTIME_VAL and XFRMA_REPLAY_VAL TLVs.
182 If you have an SA that is getting hit by traffic in bursts such that
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| /Documentation/ |
| D | atomic_bitops.txt | 5 While our bitmap_{}() functions are non-atomic, we have a number of operations
33 All RMW atomic operations have a '__' prefixed variant which is non-atomic.
57 - RMW operations that have no return value are unordered;
59 - RMW operations that have a return value are fully ordered.
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| /Documentation/devicetree/bindings/arm/marvell/ |
| D | armada-370-xp.txt | 5 shall have the following property:
11 In addition, boards using the Marvell Armada 370 SoC shall have the
18 In addition, boards using the Marvell Armada XP SoC shall have the
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| D | 98dx3236.txt | 5 shall have the following property:
11 In addition, boards using the Marvell 98DX3336 SoC shall have the
18 In addition, boards using the Marvell 98DX4251 SoC shall have the
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| D | armada-39x.txt | 4 Boards with a SoC of the Marvell Armada 39x family shall have the
11 In addition, boards using the Marvell Armada 395 SoC shall have the
22 Boards using the Marvell Armada 398 SoC shall have the following
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| /Documentation/admin-guide/media/ |
| D | opera-firmware.rst | 22 and after that you have 2 files:
32 (if you have enabled firmware loading
33 in kernel config and have hotplug running).
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| /Documentation/driver-api/media/drivers/ |
| D | bttv-devel.rst | 22 You should verify this is correct. If it isn't, you have to pass the
32 Some boards have an extra processor for sound to do stereo decoding
34 example. If your board has one, you might have to load a helper
39 Of course you need a correctly installed soundcard unless you have the
50 The bt8xx chips have 32 general purpose pins, and registers to control
64 information for each known board. You basically have to create a new
85 What you have to do is figure out the correct values for gpiomask and
86 the audiomux array. If you have Windows and the drivers four your
92 You can have a look at the board to see which of the gpio pins are
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| /Documentation/driver-api/driver-model/ |
| D | driver.rst | 84 The driver registers the structure on startup. For drivers that have
85 no bus-specific fields (i.e. don't have a bus-specific driver
89 Most drivers, however, will have a bus-specific structure and will
123 The devices field is a list of all the devices that have been bound to
168 the driver did not bind to this device, in which case it should have
191 devices of the device have successfully probed. The list of consumers of the
198 point in time have already probed successfully, sync_state() is called right
200 too is considered as "all consumers of the device have probed" and sync_state()
210 A typical use case for sync_state() is to have the kernel cleanly take over
214 consumers of the device have probed. Once all the consumers of the device have
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| /Documentation/ABI/testing/ |
| D | sysfs-bus-iio-adc-hi8435 | 20 Channels 0..31 have common low threshold values, but could have different
40 Channels 0..31 have common high threshold values, but could have different
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| D | sysfs-class-powercap | 92 constraint can have an optional name. Here "X" can have values
102 Here "X" can have values from 0 to max integer.
111 Here "X" can have values from 0 to max integer.
120 Here "X" can have values from 0 to max integer.
128 Here "X" can have values from 0 to max integer.
136 constraint. Here "X" can have values from 0 to max integer.
144 constraint. Here "X" can have values from 0 to max integer.
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| /Documentation/watchdog/ |
| D | mlx-wdt.rst | 32 all new systems have type 2 HW watchdog.
33 Two types of HW implementation have also different register map.
38 Old systems still have only one main watchdog.
40 Mellanox system can have 2 watchdogs: main and auxiliary.
66 Programmable logic device registers have little-endian order.
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| /Documentation/devicetree/bindings/ |
| D | example-schema.yaml | 79 # Cases that have only a single entry just need to express that with maxItems
83 The items should have a fixed order, so pattern matching names are
103 The items should have a fixed order, so pattern matching names are
120 # The core checks this is a boolean, so just have to list it here to be
140 # Vendor-specific properties have slightly different schema requirements than
141 # common properties. They must have at least a type definition and
144 description: Vendor-specific properties must have a description
149 description: Vendor-specific properties must have a description. Boolean
185 description: Child node properties have all the same schema
238 # Ideally, the schema should have this line otherwise any other properties
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| /Documentation/locking/ |
| D | spinlocks.rst | 39 using spinlocks they tend to expand to areas you might not have noticed
40 before, because you have to make sure the spinlocks correctly protect the
55 If your data accesses have a very natural pattern where you usually tend
82 **changes** the list will have to get the write lock.
88 time need to do any changes (even if you don't do it every time), you have
103 than they'd need to be, because they do have to disable interrupts
107 If you have a case where you have to protect a data structure across
121 The reasons you mustn't use these versions if you have interrupts that
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