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/Documentation/devicetree/bindings/media/i2c/
Dadv7343.txt3 The ADV7343 are high speed, digital-to-analog video encoders in a 64-lead LQFP
4 package. Six high speed, 3.3 V, 11-bit video DACs provide support for composite
5 (CVBS), S-Video (Y-C), and component (YPrPb/RGB) analog outputs in standard
6 definition (SD), enhanced definition (ED), or high definition (HD) video
10 - compatible: Must be "adi,adv7343"
13 - adi,power-mode-sleep-mode: on enable the current consumption is reduced to
16 - adi,power-mode-pll-ctrl: PLL and oversampling control. This control allows
19 - ad,adv7343-power-mode-dac: array configuring the power on/off DAC's 1..6,
22 - ad,adv7343-sd-config-dac-out: array configure SD DAC Output's 1 and 2, 0 = OFF
38 adi,power-mode-sleep-mode;
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Dovti,ov02a10.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Dongchun Zhu <dongchun.zhu@mediatek.com>
13 description: |-
14 The Omnivision OV02A10 is a low-cost, high performance, 1/5-inch, 2 megapixel
16 image sensor technology. Ihis chip supports high frame rate speeds up to 30fps
17 @ 1600x1200 (UXGA) resolution transferred over a 1-lane MIPI interface. The
18 sensor output is available via CSI-2 serial data output.
21 - $ref: /schemas/media/video-interface-devices.yaml#
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Dovti,ov2680.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rui Miguel Silva <rmfrfs@gmail.com>
12 description: |-
13 The OV2680 color sensor is a low voltage, high performance 1/5 inch UXGA (2
14 megapixel) CMOS image sensor that provides a single-chip UXGA (1600 x 1200)
15 camera. It provides full-frame, sub-sampled, or windowed 10-bit images in
30 clock-names:
33 reset-gpios:
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Dovti,ov8856.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Sakari Ailus <sakari.ailus@linux.intel.com>
13 description: |-
14 The Omnivision OV8856 is a high performance, 1/4-inch, 8 megapixel, CMOS
15 image sensor that delivers 3264x2448 at 30fps. It provides full-frame,
16 sub-sampled, and windowed 10-bit MIPI images in various formats via the
18 through I2C and two-wire SCCB. The sensor output is available via CSI-2
19 serial data output (up to 4-lane).
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/Documentation/devicetree/bindings/powerpc/fsl/
Dmpic.txt14 - compatible
17 Definition: Shall include "fsl,mpic". Freescale MPIC
22 - reg
24 Value type: <prop-encoded-array>
25 Definition: A standard property. Specifies the physical
29 - interrupt-controller
32 Definition: Specifies that this node is an interrupt
35 - #interrupt-cells
38 Definition: Shall be 2 or 4. A value of 2 means that interrupt
39 specifiers do not contain the interrupt-type or type-specific
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Dinterlaken-lac.txt2 Freescale Interlaken Look-Aside Controller Device Bindings
6 - Interlaken Look-Aside Controller (LAC) Node
7 - Example LAC Node
8 - Interlaken Look-Aside Controller (LAC) Software Portal Node
9 - Interlaken Look-Aside Controller (LAC) Software Portal Child Nodes
10 - Example LAC SWP Node with Child Nodes
13 Interlaken Look-Aside Controller (LAC) Node
17 The Interlaken is a narrow, high speed channelized chip-to-chip interface. To
18 facilitate interoperability between a data path device and a look-aside
19 co-processor, the Interlaken Look-Aside protocol is defined for short
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/Documentation/devicetree/bindings/serio/
Dps2-gpio.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/serio/ps2-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Danilo Krummrich <danilokrummrich@dk-develop.de>
14 const: ps2-gpio
16 data-gpios:
18 the gpio used for the data signal - this should be flagged as
19 active high using open drain with (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)
20 from <dt-bindings/gpio/gpio.h> since the signal is open drain by
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/Documentation/devicetree/bindings/iio/proximity/
Ddevantech-srf04.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/iio/proximity/devantech-srf04.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andreas Klinger <ak@it-klinger.de>
13 Bit-banging driver using two GPIOs:
14 - trigger-gpio is raised by the driver to start sending out an ultrasonic
16 - echo-gpio is held high by the sensor after sending ultrasonic burst
20 https://www.robot-electronics.co.uk/htm/srf04tech.htm
22 https://www.maxbotix.com/documents/LV-MaxSonar-EZ_Datasheet.pdf
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/Documentation/devicetree/bindings/pinctrl/
Dsprd,pinctrl.txt16 of them, so we can not make every Spreadtrum-special configuration
28 register definition, and each register described one pin is used
35 - input-enable
36 - input-disable
37 - output-high
38 - output-low
39 - bias-pull-up
40 - bias-pull-down
46 and set the pin sleep related configuration as "input-enable", which
54 "sprd,sleep-mode" property to set pin sleep mode.
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Dsprd,sc9860-pinctrl.txt7 - compatible: Must be "sprd,sc9860-pinctrl".
8 - reg: The register address of pin controller device.
9 - pins : An array of strings, each string containing the name of a pin.
12 - function: A string containing the name of the function, values must be
14 - drive-strength: Drive strength in mA. Supported values: 2, 4, 6, 8, 10,
16 - input-schmitt-disable: Enable schmitt-trigger mode.
17 - input-schmitt-enable: Disable schmitt-trigger mode.
18 - bias-disable: Disable pin bias.
19 - bias-pull-down: Pull down on pin.
20 - bias-pull-up: Pull up on pin. Supported values: 20000 for pull-up resistor
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/Documentation/devicetree/bindings/i2c/
Di2c-gpio.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Wolfram Sang <wsa@kernel.org>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
18 - const: i2c-gpio
20 sda-gpios:
23 active high using open drain with (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)
24 from <dt-bindings/gpio/gpio.h> since the signal is by definition
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/Documentation/devicetree/bindings/iio/filter/
Dadi,admv8818.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ADMV8818 Digitally Tunable, High-Pass and Low-Pass Filter
10 - Antoniu Miclaus <antoniu.miclaus@analog.com>
15 The device features four independently controlled high-pass
16 filters (HPFs) and four independently controlled low-pass filters
24 - adi,admv8818
29 spi-max-frequency:
34 Definition of the external clock.
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/Documentation/userspace-api/media/v4l/
Dbiblio.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
10 CEA 608-E
14 :title: CEA-608-E R-2014 "Line 21 Data Services"
24 :title: EN 300 294 "625-line television Wide Screen Signalling (WSS)"
50 ISO 13818-1
54 :title: ITU-T Rec. H.222.0 | ISO/IEC 13818-1 "Information technology --- Generic coding of movi…
60 ISO 13818-2
64 :title: ITU-T Rec. H.262 | ISO/IEC 13818-2 "Information technology --- Generic coding of moving…
74 :title: ITU-R Recommendation BT.470-6 "Conventional Television Systems"
84 :title: ITU-R Recommendation BT.601-5 "Studio Encoding Parameters of Digital Television for Sta…
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Ddv-timings.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _dv-timings:
11 hardware interfaces such as High Definition TV interfaces (HDMI), VGA,
14 it is not possible to extend the :ref:`v4l2_std_id <v4l2-std-id>`
21 widths etc. The ``linux/v4l2-dv-timings.h`` header can be used to get
57 Applications can make use of the :ref:`input-capabilities` and
58 :ref:`output-capabilities` flags to determine whether the digital
/Documentation/devicetree/bindings/interrupt-controller/
Dopen-pic.txt13 - compatible: Specifies the compatibility list for the PIC. The type
14 shall be <string> and the value shall include "open-pic".
16 - reg: Specifies the base physical address(s) and size(s) of this
17 PIC's addressable register space. The type shall be <prop-encoded-array>.
19 - interrupt-controller: The presence of this property identifies the node
22 - #interrupt-cells: Specifies the number of cells needed to encode an
25 - #address-cells: Specifies the number of cells needed to encode an
27 'interrupt-map' nodes do not have to specify a parent unit address.
31 - pic-no-reset: The presence of this property indicates that the PIC
37 * Interrupt Specifier Definition
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Dimg,pdc-intc.txt10 - compatible: Specifies the compatibility list for the interrupt controller.
11 The type shall be <string> and the value shall include "img,pdc-intc".
13 - reg: Specifies the base PDC physical address(s) and size(s) of the
14 addressable register space. The type shall be <prop-encoded-array>.
16 - interrupt-controller: The presence of this property identifies the node
19 - #interrupt-cells: Specifies the number of cells needed to encode an
22 - num-perips: Number of waking peripherals.
24 - num-syswakes: Number of SysWake inputs.
26 - interrupts: List of interrupt specifiers. The first specifier shall be the
30 * Interrupt Specifier Definition
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/Documentation/devicetree/bindings/gpio/
Drealtek,rtd-gpio.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/gpio/realtek,rtd-gpio.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Tzuyi Chang <tychang@realtek.com>
15 RTD series SoC family, which are high-definition media processor SoCs.
20 - realtek,rtd1295-misc-gpio
21 - realtek,rtd1295-iso-gpio
22 - realtek,rtd1315e-iso-gpio
23 - realtek,rtd1319-iso-gpio
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Dgpio.txt5 -----------------
7 GPIO properties should be named "[<name>-]gpios", with <name> being the purpose
8 of this GPIO for the device. While a non-existent <name> is considered valid
10 for new bindings. Also, GPIO properties named "[<name>-]gpio" are valid and old
24 and bit-banged data signals:
27 gpio-controller;
28 #gpio-cells = <2>;
32 data-gpios = <&gpio1 12 0>,
44 recommended to use the two-cell approach.
48 include/dt-bindings/gpio/gpio.h whenever possible:
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/Documentation/devicetree/bindings/i3c/
Di3c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Belloni <alexandre.belloni@bootlin.com>
11 - Miquel Raynal <miquel.raynal@bootlin.com>
20 pattern: "^i3c@[0-9a-f]+$"
22 "#address-cells":
39 "#size-cells":
42 i3c-scl-hz:
49 i2c-scl-hz:
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/Documentation/devicetree/bindings/display/bridge/
Dite,it6505.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Allen Chen <allen.chen@ite.com.tw>
13 - $ref: /schemas/sound/dai-common.yaml#
16 The IT6505 is a high-performance DisplayPort 1.1a transmitter,
19 and ensures robust transmission of high-quality uncompressed video
30 transmission of high-definition content. Users of the IT6505 need not
40 ovdd-supply:
43 pwr18-supply:
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/Documentation/devicetree/bindings/phy/
Dmediatek,hdmi-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/phy/mediatek,hdmi-phy.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: MediaTek High Definition Multimedia Interface (HDMI) PHY
11 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
12 - Philipp Zabel <p.zabel@pengutronix.de>
13 - Chunfeng Yun <chunfeng.yun@mediatek.com>
16 The HDMI PHY serializes the HDMI encoder's three channel 10-bit parallel
21 pattern: "^hdmi-phy@[0-9a-f]+$"
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/Documentation/devicetree/bindings/iio/adc/
Dadi,ad7944.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Hennerich <Michael.Hennerich@analog.com>
11 - Nuno Sá <nuno.sa@analog.com>
14 A family of pin-compatible single channel differential analog to digital
21 $ref: /schemas/spi/spi-peripheral-props.yaml#
26 - adi,ad7944
27 - adi,ad7985
28 - adi,ad7986
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/Documentation/devicetree/bindings/sound/
Dnvidia,tegra30-hda.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra30-hda.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The High Definition Audio (HDA) block provides a serial interface to
14 - Thierry Reding <treding@nvidia.com>
15 - Jon Hunter <jonathanh@nvidia.com>
19 pattern: "^hda@[0-9a-f]*$"
23 - const: nvidia,tegra30-hda
24 - items:
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/Documentation/driver-api/iio/
Dbuffers.rst52 For example, a driver for a 3-axis accelerometer with 12 bit resolution where
53 data is stored in two 8-bits registers as follows::
56 +---+---+---+---+---+---+---+---+
58 +---+---+---+---+---+---+---+---+
61 +---+---+---+---+---+---+---+---+
62 |D11|D10|D9 |D8 |D7 |D6 |D5 |D4 | (HIGH byte, address 0x07)
63 +---+---+---+---+---+---+---+---+
75 fields in iio_chan_spec definition::
91 following channel definition::
118 Setting **scan_index** to -1 can be used to indicate that the specific channel
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/Documentation/devicetree/bindings/mfd/
Dtps6507x.txt4 - compatible: "ti,tps6507x"
5 - reg: I2C slave address
6 - regulators: This is the list of child nodes that specify the regulator
8 given device need to be present. The definition for each of these nodes
11 The regulator is matched with the regulator-compatible.
13 The valid regulator-compatible values are:
15 - xxx-supply: Input voltage supply regulator.
19 If some of input supply is powered through battery or always-on
23 vindcdc1_2-supply: VDCDC1 and VDCDC2 input.
24 vindcdc3-supply : VDCDC3 input.
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