Searched full:high (Results 1 – 25 of 1153) sorted by relevance
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| /Documentation/userspace-api/media/v4l/ |
| D | pixfmt-srggb10-ipu3.rst | 42 B\ :sub:`0000high`\ (bits 1--0)
45 G\ :sub:`0001high`\ (bits 3--0)
48 B\ :sub:`0002high`\ (bits 5--0)
50 - G\ :sub:`0003high`
54 B\ :sub:`0004high`\ (bits 1--0)
57 G\ :sub:`0005high`\ (bits 3--0)
61 B\ :sub:`0006high`\ (bits 5--0)
62 - G\ :sub:`0007high`
66 B\ :sub:`0008high`\ (bits 1--0)
70 G\ :sub:`0009high`\ (bits 3--0)
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| D | pixfmt-tch-tu16.rst | 33 - R'\ :sub:`00high`
35 - R'\ :sub:`01high`
37 - R'\ :sub:`02high`
39 - R'\ :sub:`03high`
42 - R'\ :sub:`10high`
44 - R'\ :sub:`11high`
46 - R'\ :sub:`12high`
48 - R'\ :sub:`13high`
51 - R'\ :sub:`20high`
53 - R'\ :sub:`21high`
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| D | pixfmt-z16.rst | 33 - Z\ :sub:`00high`
35 - Z\ :sub:`01high`
37 - Z\ :sub:`02high`
39 - Z\ :sub:`03high`
42 - Z\ :sub:`10high`
44 - Z\ :sub:`11high`
46 - Z\ :sub:`12high`
48 - Z\ :sub:`13high`
51 - Z\ :sub:`20high`
53 - Z\ :sub:`21high`
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| D | pixfmt-tch-td16.rst | 34 - D'\ :sub:`00high`
36 - D'\ :sub:`01high`
38 - D'\ :sub:`02high`
40 - D'\ :sub:`03high`
43 - D'\ :sub:`10high`
45 - D'\ :sub:`11high`
47 - D'\ :sub:`12high`
49 - D'\ :sub:`13high`
52 - D'\ :sub:`20high`
54 - D'\ :sub:`21high`
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| D | pixfmt-srggb12.rst | 25 high bits filled with zeros. Each n-pixel row contains n/2 green samples
32 Each cell is one byte, the 4 most significant bits in the high bytes are
44 - B\ :sub:`00high`
46 - G\ :sub:`01high`
48 - B\ :sub:`02high`
50 - G\ :sub:`03high`
53 - G\ :sub:`10high`
55 - R\ :sub:`11high`
57 - G\ :sub:`12high`
59 - R\ :sub:`13high`
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| D | pixfmt-srggb10.rst | 24 high bits filled with zeros. Each n-pixel row contains n/2 green samples and
31 Each cell is one byte, the 6 most significant bits in the high bytes
43 - B\ :sub:`00high`
45 - G\ :sub:`01high`
47 - B\ :sub:`02high`
49 - G\ :sub:`03high`
52 - G\ :sub:`10high`
54 - R\ :sub:`11high`
56 - G\ :sub:`12high`
58 - R\ :sub:`13high`
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| D | pixfmt-srggb14.rst | 23 colour. Each sample is stored in a 16-bit word, with two unused high
31 Each cell is one byte, the two most significant bits in the high bytes are
44 - B\ :sub:`00high`
46 - G\ :sub:`01high`
48 - B\ :sub:`02high`
50 - G\ :sub:`03high`
53 - G\ :sub:`10high`
55 - R\ :sub:`11high`
57 - G\ :sub:`12high`
59 - R\ :sub:`13high`
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| D | pixfmt-srggb16.rst | 38 - B\ :sub:`00high`
40 - G\ :sub:`01high`
42 - B\ :sub:`02high`
44 - G\ :sub:`03high`
47 - G\ :sub:`10high`
49 - R\ :sub:`11high`
51 - G\ :sub:`12high`
53 - R\ :sub:`13high`
56 - B\ :sub:`20high`
58 - G\ :sub:`21high`
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| D | pixfmt-srggb10p.rst | 24 bytes. Each of the first 4 bytes contain the 8 high order bits
44 - B\ :sub:`00high`
45 - G\ :sub:`01high`
46 - B\ :sub:`02high`
47 - G\ :sub:`03high`
52 - G\ :sub:`10high`
53 - R\ :sub:`11high`
54 - G\ :sub:`12high`
55 - R\ :sub:`13high`
60 - B\ :sub:`20high`
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| D | pixfmt-srggb12p.rst | 22 bytes. Each of the first two bytes contain the 8 high order bits of
44 - B\ :sub:`00high`
45 - G\ :sub:`01high`
49 - B\ :sub:`02high`
50 - G\ :sub:`03high`
56 - G\ :sub:`10high`
57 - R\ :sub:`11high`
61 - G\ :sub:`12high`
62 - R\ :sub:`13high`
67 - B\ :sub:`20high`
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| D | pixfmt-srggb14p.rst | 25 bytes. Each of the first four bytes contain the eight high order bits
55 - B\ :sub:`00high`
57 - G\ :sub:`01high`
59 - B\ :sub:`02high`
61 - G\ :sub:`03high`
79 - G\ :sub:`10high`
81 - R\ :sub:`11high`
83 - G\ :sub:`12high`
85 - R\ :sub:`13high`
103 - B\ :sub:`20high`
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| /Documentation/devicetree/bindings/regulator/ |
| D | richtek,rtmv20-regulator.yaml | 38 load current pulse delay in microsecond after strobe pin pulse high.
45 Load current pulse width in microsecond after strobe pin pulse high.
52 Fsin1 pulse high delay in microsecond after vsync signal pulse high.
59 Fsin1 pulse high width in microsecond after vsync signal pulse high.
66 Fsin2 pulse high delay in microsecond after vsync signal pulse high.
73 Fsin2 pulse high width in microsecond after vsync signal pulse high.
100 richtek,strobe-polarity-high:
104 richtek,vsync-polarity-high:
150 richtek,strobe-polarity-high;
151 richtek,vsync-polarity-high;
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| /Documentation/hwmon/ |
| D | ir35221.rst | 42 curr1_max_alarm Current high alarm
47 curr[2-3]_crit_alarm Current critical high alarm
51 curr[2-3]_max_alarm Current high alarm
56 in1_crit_alarm Input voltage critical high alarm
67 in[2-3]_crit_alarm Output voltage critical high alarm
71 in[2-3]_max_alarm Output voltage high alarm
77 power1_alarm Input power high alarm
83 power[2-3]_max_alarm Output power high alarm
86 temp[1-2]_crit Critical high temperature
87 temp[1-2]_crit_alarm Chip temperature critical high alarm
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| D | isl68137.rst | 411 and 'hv' for high voltage single-rail devices. Consult the individual datasheets
437 curr1_crit_alarm Current critical high alarm
442 curr[2-3]_crit_alarm Current critical high alarm
449 in1_crit_alarm Input voltage critical high alarm
456 in[2-3]_crit_alarm Output voltage critical high alarm
460 power1_alarm Input power high alarm
466 temp[1-3]_crit Critical high temperature
467 temp[1-3]_crit_alarm Chip temperature critical high alarm
469 temp[1-3]_max_alarm Chip temperature high alarm
479 curr1_crit_alarm Current critical high alarm
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| D | pxe1610.rst | 44 - Servers, Workstations, and High-end desktops
76 curr1_alarm Current high alarm
81 curr[2-4]_crit_alarm Current critical high alarm
86 in1_crit_alarm Input voltage critical high alarm
93 in[2-4]_crit_alarm Output voltage critical high alarm
97 power1_alarm Input power high alarm
103 temp[1-3]_crit Critical high temperature
104 temp[1-3]_crit_alarm Chip temperature critical high alarm
106 temp[1-3]_max_alarm Chip temperature high alarm
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| D | ir38064.rst | 60 curr1_crit_alarm Current critical high alarm
62 curr1_max_alarm Current high alarm
67 in1_crit_alarm Input voltage critical high alarm
76 in2_crit_alarm Output voltage critical high alarm
78 in2_max_alarm Output voltage high alarm
86 temp1_crit Critical high temperature
87 temp1_crit_alarm Chip temperature critical high alarm
89 temp1_max_alarm Chip temperature high alarm
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| D | ina2xx.rst | 61 The INA219 is a high-side current shunt and power monitor with an I2C
65 The INA220 is a high or low side current shunt and power monitor with an I2C
71 INA230 and INA231 are high or low side current shunt and power monitors
103 curr1_crit Critical high current
105 curr1_crit_alarm Current critical high alarm
107 in0_crit Critical high shunt voltage
109 in0_crit_alarm Shunt voltage critical high alarm
111 in1_crit Critical high bus voltage
113 in1_crit_alarm Bus voltage critical high alarm
114 power1_crit Critical high power
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| D | max16601.rst | 86 curr1_max_alarm Current high alarm.
104 curr[N+4]_max_alarm Output current high alarm.
116 curr[2*N+5]_max_alarm Output current high alarm.
130 temp1_crit Critical high temperature.
131 temp1_crit_alarm Chip temperature critical high alarm.
133 temp1_max_alarm Chip temperature high alarm.
141 temp6_crit Critical high temperature.
142 temp6_crit_alarm Chip temperature critical high alarm.
144 temp6_max_alarm Chip temperature high alarm.
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| D | lt7182s.rst | 48 curr[1-2]_max_alarm Current high alarm
54 curr[3-4]_max_alarm Output current high alarm
60 in[1-2]_crit_alarm Input voltage critical high alarm
80 in[3-4|6-7]_max_alarm Output voltage high alarm
82 in[3-4|6-7]_crit_alarm Output voltage critical high alarm
88 temp1_crit Critical high temperature
89 temp1_crit_alarm Chip temperature critical high alarm
91 temp1_max_alarm Chip temperature high alarm
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| /Documentation/arch/arm64/ |
| D | kdump.rst | 22 be considered if the crashkernel is reserved from the high memory area.
26 - crashkernel=size,high crashkernel=size,low
28 Low memory and high memory
38 above, the rest of system RAM is considered high memory.
60 the high memory area for an available region of the specified size. If
61 the reservation in high memory succeeds, a default size reservation in
69 3) crashkernel=size,high crashkernel=size,low
72 crashkernel=size,(high|low) are an important supplement to
74 to be allocated from the high memory and low memory respectively. On
78 To reserve memory for crashkernel=size,high, searching is first
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| /Documentation/fb/ |
| D | viafb.modes | 202 timings 25000 88 40 23 1 128 4 hsync high vsync high endmode
224 timings 20203 160 16 21 1 80 3 hsync high vsync high endmode
246 timings 17777 152 32 27 1 64 3 hsync high vsync high endmode
268 timings 14667 216 0 14 7 64 4 hsync high vsync high endmode
290 timings 11912 144 56 39 1 88 3 hsync high vsync high endmode
312 timings 31746 104 24 12 3 80 5 hsync high vsync high endmode
335 hsync high vsync high endmode mode "960x600-60"
389 timings 24218 126 32 15 1 104 3 hsync high vsync high endmode
455 timings 12699 176 16 28 1 96 3 hsync high vsync high endmode
477 timings 10582 208 48 36 1 96 3 hsync high vsync high endmode
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| /Documentation/ABI/testing/ |
| D | sysfs-bus-iio-adc-hi8435 | 24 Hysteresis between low and high thresholds can not be lower then 2 and
35 Channel Y high voltage threshold. If sensor input voltage goes higher then
37 Depending on in_voltageY_sensing_mode the high voltage threshold
40 Channels 0..31 have common high threshold values, but could have different
43 The high voltage threshold range is between 3..22V.
44 Hysteresis between low and high thresholds can not be lower then 2 and
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| D | sysfs-bus-pci-drivers-ehci_hcd | 7 PCI-based EHCI USB controllers (i.e., high-speed USB-2.0
10 high-speed device is plugged in, the connection is routed
15 Sometimes you want to force a high-speed device to connect
23 For example: To force the high-speed device attached to
28 To return the port to high-speed operation::
39 cannot be used to force a port on a high-speed hub to
|
| /Documentation/timers/ |
| D | hrtimers.rst | 2 hrtimers - subsystem for high-resolution kernel timers
5 This patch introduces a new subsystem for high-resolution kernel timers.
9 back and forth trying to integrate high-resolution and high-precision
11 such high-resolution timer implementations in practice, we came to the
18 - the forced handling of low-resolution and high-resolution timers in
27 high-res timers.
30 necessitate a more complex handling of high resolution timers, which
40 example: that the timer wheel data structure is too rigid for high-res
62 high-resolution timer subsystem as well.
64 While this subsystem does not offer high-resolution clock sources just
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| /Documentation/devicetree/bindings/bus/ |
| D | nvidia,tegra20-gmi.txt | 4 external memory. Can be used to attach various high speed devices such as
47 - nvidia,snor-rdy-active-high: RDY signal is active high
48 - nvidia,snor-adv-active-high: ADV signal is active high
49 - nvidia,snor-oe-active-high: WE/OE signal is active high
50 - nvidia,snor-cs-active-high: CS signal is active high
94 nvidia,snor-adv-active-high;
125 nvidia,snor-adv-active-high;
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