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/Documentation/translations/zh_CN/admin-guide/
Dcpu-load.rst10 Linux 2.6.18.3-exp (linmac) 02/20/2007
12 avg-cpu: %user %nice %system %iowait %steal %idle
29 ---
34 |-----------------------|
46 /* gcc -o hog smallhog.c */
60 static unsigned long hog (unsigned long niters)
63 while (!stop && --niters);
78 hog (ULONG_MAX);
79 for (i = 0; i < HIST; ++i) v[i] = ULONG_MAX - hog (ULONG_MAX);
82 n = tmp - (tmp / 3.0);
[all …]
/Documentation/translations/zh_TW/admin-guide/
Dcpu-load.rst1 .. SPDX-License-Identifier: GPL-2.0
3 .. include:: ../disclaimer-zh_TW.rst
16 Linux 2.6.18.3-exp (linmac) 02/20/2007
18 avg-cpu: %user %nice %system %iowait %steal %idle
35 ---
40 |-----------------------|
52 /* gcc -o hog smallhog.c */
66 static unsigned long hog (unsigned long niters)
69 while (!stop && --niters);
84 hog (ULONG_MAX);
[all …]
/Documentation/admin-guide/gpio/
Dgpio-sim.rst1 .. SPDX-License-Identifier: GPL-2.0-or-later
6 The configfs GPIO Simulator (gpio-sim) provides a way to create simulated GPIO
12 ------------------------
14 The gpio-sim module registers a configfs subsystem called ``'gpio-sim'``. For
21 **Group:** ``/config/gpio-sim``
23 This is the top directory of the gpio-sim configfs tree.
25 **Group:** ``/config/gpio-sim/gpio-device``
27 **Attribute:** ``/config/gpio-sim/gpio-device/dev_name``
29 **Attribute:** ``/config/gpio-sim/gpio-device/live``
32 attribute is read-only and allows the user-space to read the platform device
[all …]
/Documentation/devicetree/bindings/mfd/
Ddlg,da9063.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Steve Twiss <stwiss.opensource@diasemi.com>
13 For device-tree bindings of other sub-modules refer to the binding documents
14 under the respective sub-system directories.
15 Using regulator-{uv,ov}-{warn,error,protection}-microvolt requires special
21 - https://www.dialog-semiconductor.com/products/da9063l
22 - https://www.dialog-semiconductor.com/products/da9063
23 - https://www.dialog-semiconductor.com/products/da9062
[all …]
Dadi,adp5585.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
19 - enum:
20 - adi,adp5585-00 # Default
21 - adi,adp5585-01 # 11 GPIOs
22 - adi,adp5585-02 # No pull-up resistors by default on special pins
23 - adi,adp5585-03 # Alternate I2C address
24 - adi,adp5585-04 # Pull-down resistors on all pins by default
[all …]
/Documentation/devicetree/bindings/gpio/
Dfcs,fxl6408.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
15 - fcs,fxl6408
20 "#gpio-cells":
23 gpio-controller: true
25 gpio-line-names:
30 "^(hog-[0-9]+|.+-hog(-[0-9]+)?)$":
33 - gpio-hog
[all …]
Dfairchild,74hc595.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Generic 8-bit shift register
10 - Maxime Ripard <mripard@kernel.org>
15 - fairchild,74hc595
16 - nxp,74lvc594
21 gpio-controller: true
23 '#gpio-cells':
28 registers-number:
[all …]
Dti,omap-gpio.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/ti,omap-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Grygorii Strashko <grygorii.strashko@ti.com>
13 The general-purpose interface combines general-purpose input/output (GPIO) banks.
14 Each GPIO banks provides up to 32 dedicated general-purpose pins with input
15 and output capabilities; interrupt generation in active mode and wake-up
21 - enum:
22 - ti,omap2-gpio
[all …]
Dgpio-pca95xx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/gpio-pca95xx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
19 - items:
20 - const: diodes,pi4ioe5v6534q
21 - const: nxp,pcal6534
22 - items:
23 - enum:
[all …]
Dfsl-imx-gpio.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/gpio/fsl-imx-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
11 - Sascha Hauer <s.hauer@pengutronix.de>
12 - Fabio Estevam <festevam@gmail.com>
17 - enum:
18 - fsl,imx1-gpio
19 - fsl,imx21-gpio
[all …]
Dst,stmpe-gpio.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/st,stmpe-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
17 - Linus Walleij <linus.walleij@linaro.org>
21 const: st,stmpe-gpio
23 "#gpio-cells":
26 "#interrupt-cells":
29 gpio-controller: true
31 gpio-line-names:
[all …]
Drockchip,gpio-bank.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/gpio/rockchip,gpio-bank.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Heiko Stuebner <heiko@sntech.de>
15 - rockchip,gpio-bank
16 - rockchip,rk3188-gpio-bank0
27 - description: APB interface clock source
28 - description: GPIO debounce reference clock source
30 gpio-ranges: true
[all …]
Dmicrochip,mpfs-gpio.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/microchip,mpfs-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Conor Dooley <conor.dooley@microchip.com>
15 - enum:
16 - microchip,mpfs-gpio
17 - microchip,coregpio-rtl-v3
28 interrupt-controller: true
33 "#gpio-cells":
[all …]
Dgpio-vf610.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/gpio-vf610.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Stefan Agner <stefan@agner.ch>
23 - const: fsl,imx8ulp-gpio
24 - const: fsl,vf610-gpio
25 - items:
26 - const: fsl,imx7ulp-gpio
27 - const: fsl,vf610-gpio
[all …]
Dsocionext,uniphier-gpio.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/gpio/socionext,uniphier-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Masahiro Yamada <yamada.masahiro@socionext.com>
14 pattern: "^gpio@[0-9a-f]+$"
17 const: socionext,uniphier-gpio
22 gpio-controller: true
24 "#gpio-cells":
27 interrupt-controller: true
[all …]
Dnxp,pcf8575.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: PCF857x-compatible I/O expanders
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
13 The PCF857x-compatible chips have "quasi-bidirectional" I/O lines that can be
14 driven high by a pull-up current source or driven low to ground. This
25 - maxim,max7328
26 - maxim,max7329
27 - nxp,pca8574
[all …]
Dgpio.txt5 -----------------
7 GPIO properties should be named "[<name>-]gpios", with <name> being the purpose
8 of this GPIO for the device. While a non-existent <name> is considered valid
10 for new bindings. Also, GPIO properties named "[<name>-]gpio" are valid and old
24 and bit-banged data signals:
27 gpio-controller;
28 #gpio-cells = <2>;
32 data-gpios = <&gpio1 12 0>,
44 recommended to use the two-cell approach.
48 include/dt-bindings/gpio/gpio.h whenever possible:
[all …]
Drenesas,rcar-gpio.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/renesas,rcar-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car General-Purpose Input/Output Ports (GPIO)
10 - Geert Uytterhoeven <geert+renesas@glider.be>
15 - items:
16 - enum:
17 - renesas,gpio-r8a7778 # R-Car M1
18 - renesas,gpio-r8a7779 # R-Car H1
[all …]
/Documentation/admin-guide/
Dcpu-load.rst10 Linux 2.6.18.3-exp (linmac) 02/20/2007
12 avg-cpu: %user %nice %system %iowait %steal %idle
34 -------
40 |--------------------------------------|
55 /* gcc -o hog smallhog.c */
70 static unsigned long hog (unsigned long niters)
73 while (!stop && --niters);
90 hog (ULONG_MAX);
91 for (i = 0; i < HIST; ++i) v[i] = ULONG_MAX - hog(ULONG_MAX);
94 n = tmp - (tmp / 3.0);
[all …]
/Documentation/devicetree/bindings/pinctrl/
Damlogic,meson-pinctrl-common.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/amlogic,meson-pinctrl-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Neil Armstrong <neil.armstrong@linaro.org>
13 - $ref: pinctrl.yaml#
18 "#address-cells":
21 "#size-cells":
25 - ranges
26 - "#address-cells"
[all …]
Dqcom,sdm845-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,sdm845-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
11 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
17 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
21 const: qcom,sdm845-pinctrl
29 gpio-reserved-ranges:
33 gpio-line-names:
[all …]
Dbrcm,nsp-gpio.txt4 - compatible:
5 Must be "brcm,nsp-gpio-a"
7 - reg:
11 - #gpio-cells:
16 - gpio-controller:
19 - ngpios:
23 - interrupts:
26 - interrupt-controller:
29 - gpio-ranges:
30 Specifies the mapping between gpio controller and pin-controllers pins.
[all …]
Dqcom,ipq4019-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,ipq4019-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
16 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
20 const: qcom,ipq4019-pinctrl
28 gpio-reserved-ranges: true
31 "-state$":
33 - $ref: "#/$defs/qcom-ipq4019-tlmm-state"
[all …]
Drenesas,pfc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Geert Uytterhoeven <geert+renesas@glider.be>
14 On SH/R-Mobile SoCs it also acts as a GPIO controller.
19 - renesas,pfc-emev2 # EMMA Mobile EV2
20 - renesas,pfc-r8a73a4 # R-Mobile APE6
21 - renesas,pfc-r8a7740 # R-Mobile A1
22 - renesas,pfc-r8a7742 # RZ/G1H
23 - renesas,pfc-r8a7743 # RZ/G1M
[all …]
Drenesas,rzg2l-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/renesas,rzg2l-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Geert Uytterhoeven <geert+renesas@glider.be>
11 - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
16 Pin multiplexing and GPIO configuration is performed on a per-pin basis.
24 - items:
25 - enum:
26 - renesas,r9a07g043-pinctrl # RZ/G2UL{Type-1,Type-2} and RZ/Five
[all …]

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