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| /Documentation/mhi/ |
| D | mhi.rst | 4 MHI (Modem Host Interface)
13 by the host processors to control and communicate with modem devices over high
29 which are mapped to the host memory space by the peripheral buses like PCIe.
34 MHI BHI registers: BHI (Boot Host Interface) registers are used by the host
37 Channel Doorbell array: Channel Doorbell (DB) registers used by the host to
41 (DB) registers are used by the host to notify the device when new events are
45 debugging information like performance, functional, and stability to the host.
50 All data structures used by MHI are in the host system memory. Using the
52 structures and data buffers in the host system memory regions are mapped for
58 Transfer rings: Used by the host to schedule work items for a channel. The
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| /Documentation/devicetree/bindings/clock/ |
| D | mvebu-gated-clock.txt | 20 15 sata0 SATA Host 0
21 17 sdio SDHCI Host
25 30 sata1 SATA Host 0
39 16 usb3 USB3 Host
40 17 sdio SDHCI Host
41 18 usb USB Host
65 9 usb3h0 USB3 Host 0
66 10 usb3h1 USB3 Host 1
88 9 usb3h0 USB3 Host 0
89 10 usb3h1 USB3 Host 1
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| /Documentation/scsi/ |
| D | BusLogic.rst | 28 host adapters which share a common programming interface across a diverse
34 This driver supports all present BusLogic MultiMaster Host Adapters, and should
36 recently, BusLogic introduced the FlashPoint Host Adapters, which are less
37 costly and rely on the host CPU, rather than including an onboard processor.
38 Despite not having an onboard CPU, the FlashPoint Host Adapters perform very
42 is the library of code that runs on the host CPU and performs functions
43 analogous to the firmware on the MultiMaster Host Adapters. Thanks to their
44 having provided the SCCB Manager, this driver now supports the FlashPoint Host
48 to achieve the full performance that BusLogic SCSI Host Adapters and modern
55 The latest information on Linux support for BusLogic SCSI Host Adapters, as
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| D | tcm_qla2xxx.rst | 20 selected host.
25 Setting a boolean of 1 for the jam_host attribute for a particular host
26 will discard the commands for that host.
30 Enable host 4 to be jammed::
34 Disable jamming on host 4::
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| /Documentation/driver-api/cxl/ |
| D | memory-devices.rst | 12 Address space is handled via HDM (Host Managed Device Memory) decoders
14 range across multiple devices underneath a host-bridge or interleaved
15 across host-bridges.
25 multiple Host Bridges and endpoints while another may opt for fault tolerance
30 dictates which endpoints can participate in which Host Bridge decode regimes.
33 given range only decodes to 1 one Host Bridge, but that Host Bridge may in turn
39 module generates an emulated CXL topology of 2 Host Bridges each with 2 Root
50 "host":"cxl_host_bridge.1",
54 "host":"cxl_switch_uport.1",
58 "host":"mem2",
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| /Documentation/devicetree/bindings/usb/ |
| D | s3c2410-usb.txt | 6 - compatible: should be "samsung,s3c2410-ohci" for USB host controller
9 - clocks: Should reference the bus and host clocks
11 "usb-bus-host" for the USB bus clock
12 "usb-host" for the USB host clock
21 clock-names = "usb-bus-host", "usb-host";
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| /Documentation/devicetree/bindings/display/ |
| D | mipi-dsi-bus.txt | 5 communication between a host and up to four peripherals. This document will
11 Each DSI host provides a DSI bus. The DSI host controller's node contains a
16 host. Experience shows that this is true for the large majority of setups.
18 DSI host
22 a DSI host, the following properties apply to a node representing a DSI host.
33 - clock-master: boolean. Should be enabled if the host is being used in
34 conjunction with another DSI host to drive the same peripheral. Hardware
36 to be driven by the same clock. Only the DSI host instance controlling this
47 as child nodes of the DSI host's node. Properties described here apply to all
69 path). Connections between such peripherals and a DSI host can be represented
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| /Documentation/devicetree/bindings/pci/ |
| D | host-generic-pci.yaml | 4 $id: http://devicetree.org/schemas/pci/host-generic-pci.yaml#
7 title: Generic PCI host controller
13 Firmware-initialised PCI host controllers and PCI emulations, such as the
42 PCIe host controller in Arm Juno based on PLDA XpressRICH3-AXI IP
46 - const: pci-host-ecam-generic
48 ThunderX PCI host controller for pass-1.x silicon
50 Firmware-initialized PCI host controller to on-chip devices found on
55 const: cavium,pci-host-thunder-ecam
57 Cavium ThunderX PEM firmware-initialized PCIe host controller
58 const: cavium,pci-host-thunder-pem
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| D | ti,j721e-pci-host.yaml | 5 $id: http://devicetree.org/schemas/pci/ti,j721e-pci-host.yaml#
8 title: TI J721E PCI Host (PCIe Wrapper)
16 - const: ti,j721e-pcie-host
17 - const: ti,j784s4-pcie-host
20 - const: ti,am64-pcie-host
21 - const: ti,j721e-pcie-host
24 - const: ti,j7200-pcie-host
25 - const: ti,j721e-pcie-host
28 - const: ti,j722s-pcie-host
29 - const: ti,j721e-pcie-host
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| D | pci.txt | 11 Additionally to the properties specified in the above standards a host bridge
15 If present this property assigns a fixed PCI domain number to a host bridge,
18 host bridges in the system, otherwise potentially conflicting domain numbers
19 may be assigned to root buses behind different host bridges. The domain
20 number for each host bridge in the system must be unique.
22 If present this property specifies PCI gen for link capability. Host
28 If present this property specifies PERST# GPIO. Host drivers can parse the
32 root port to downstream device and host bridge drivers can do programming
40 tree, as children of the host bridge node. Even though those devices are
77 compatible = "pci-host-ecam-generic";
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| /Documentation/ABI/testing/ |
| D | sysfs-platform-renesas_usb3 | 11 - "host" - switching mode from peripheral to host.
12 - "peripheral" - switching mode from host to peripheral.
16 - "host" - The mode is host now.
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| D | sysfs-platform-phy-rcar-gen3-usb2 | 11 - "host" - switching mode from peripheral to host.
12 - "peripheral" - switching mode from host to peripheral.
16 - "host" - The mode is host now.
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| /Documentation/virt/kvm/arm/ |
| D | pkvm.rst | 10 translation capability of the Armv8 MMU to isolate guest memory from the host
18 of the host kernel running at EL1 and therefore additional hypercalls are
21 of this change is that the host itself runs with an identity mapping enabled
22 at stage-2, providing the hypervisor code with a mechanism to restrict host
28 The pKVM hypervisor is enabled by booting the host kernel at EL2 with
45 pinned as it is mapped into the guest. This prevents the host from
61 Since the host is unable to tear down the hypervisor when pKVM is enabled,
77 features that may be available to the host are exposed to the guest and the
90 host and any attempt by the host to access such a page will result in the
92 EL0, the host will then terminate the current task with a ``SIGSEGV``.
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| /Documentation/usb/ |
| D | gadget_serial.rst | 62 or a generic USB serial driver running on a host PC::
64 Host
66 | Host-Side CDC ACM USB Host |
87 On the host-side system, the gadget serial device looks like a
92 The host side driver can potentially be any ACM compliant driver
98 With the gadget serial driver and the host side ACM or generic
100 the host and the gadget side systems as if they were connected by a
149 either the Windows or Linux ACM driver on the host side. If gadget
151 Linux generic serial driver on the host side. Follow the appropriate
152 instructions below to install the host side driver.
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| /Documentation/userspace-api/ |
| D | dcdbas.rst | 10 management interrupts and host control actions (system power cycle or
51 Host Control Action
54 Dell OpenManage supports a host control feature that allows the administrator
56 shutting down. On some Dell systems, this host control feature requires that
60 to schedule the driver to perform a power cycle or power off host control
68 power off host control action using this driver:
70 1) Write host control action to be performed to host_control_action.
72 3) Write "1" to host_control_on_shutdown to enable host control action.
74 (Driver will perform host control SMI when it is notified that the OS
78 Host Control SMI Type
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| /Documentation/filesystems/ |
| D | virtiofs.rst | 6 virtiofs: virtio-fs host<->guest shared file system
14 VIRTIO "virtio-fs" device for guest<->host file system sharing. It allows a
15 guest to mount a directory that has been exported on the host.
17 Guests often require access to files residing on the host or remote systems.
19 booting from a root file system located on the host, persistent storage for
28 guest and host to increase performance and provide semantics that are not
54 on the host.
60 client. The guest acts as the FUSE client while the host acts as the FUSE
64 FUSE requests are placed into a virtqueue and processed by the host. The
65 response portion of the buffer is filled in by the host and the guest handles
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| /Documentation/devicetree/bindings/phy/ |
| D | allwinner,sun8i-h3-usb-phy.yaml | 42 - description: USB Host 0 PHY bus clock
43 - description: USB Host 1 PHY bus clock
44 - description: USB Host 2 PHY bus clock
45 - description: PMU clock for host port 2
59 - description: USB Host 1 Controller reset
60 - description: USB Host 2 Controller reset
61 - description: USB Host 3 Controller reset
85 description: Regulator controlling USB1 Host controller
88 description: Regulator controlling USB2 Host controller
91 description: Regulator controlling USB3 Host controller
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| /Documentation/security/ |
| D | snp-tdx-threat-model.rst | 48 additional mechanisms to control guest-host page mapping. More details on
53 The basic CoCo guest layout includes the host, guest, the interfaces that
54 communicate guest and host, a platform capable of supporting CoCo VMs, and
56 that acts as a security manager. The host-side virtual machine monitor
65 the rest of the components (data flow for guest, host, hardware) ::
72 | Host VMM |<---->| |
121 kernel; particularly if the host has physical access. Examples of direct
129 potentially misbehaving host (which can also include some part of a
132 that this doesn’t imply that the host or VMM are intentionally
154 | CoCo security |<--->| Host/Host-side VMM |
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| /Documentation/ABI/stable/ |
| D | sysfs-driver-aspeed-vuart | 4 Description: Configures which IO port the host side of the UART
5 will appear on the host <-> BMC LPC bus.
12 Description: Configures which interrupt number the host side of
13 the UART will appear on the host <-> BMC LPC bus.
21 host via the BMC LPC bus.
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| D | sysfs-driver-ib_srp | 68 initiator is allowed to queue per SCSI host. The default
86 What: /sys/class/scsi_host/host<n>/allow_ext_sg
94 What: /sys/class/scsi_host/host<n>/ch_count
101 What: /sys/class/scsi_host/host<n>/cmd_sg_entries
108 What: /sys/class/scsi_host/host<n>/comp_vector
114 What: /sys/class/scsi_host/host<n>/dgid
121 What: /sys/class/scsi_host/host<n>/id_ext
128 What: /sys/class/scsi_host/host<n>/ioc_guid
135 What: /sys/class/scsi_host/host<n>/local_ib_device
142 What: /sys/class/scsi_host/host<n>/local_ib_port
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| /Documentation/accel/qaic/ |
| D | aic100.rst | 30 or a Dual M.2 card. Both use PCIe to connect to the host system.
33 DeviceID(DID) combination to uniquely identify itself to the host. AIC100
43 As a PCIe device, AIC100 utilizes BARs to provide host interfaces to the device
46 * The first BAR is 4K in size, and exposes the MHI interface to the host.
49 host.
54 From the host perspective, AIC100 has several key hardware components -
56 * MHI (Modem Host Interface)
66 Documentation/mhi/index.rst MHI is the mechanism the host uses to communicate
75 communicates with the host via MHI. Each AIC100 has one of
86 "scheduling" is under the purview of the host. AIC100 does not automatically
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| /Documentation/admin-guide/ |
| D | btmrvl.rst | 13 These commands are used to configure the host sleep parameters::
17 where GPIO is the pin number of GPIO used to wake up the host.
22 wakeup event, or 0xff for special host sleep setting.
26 # Use SDIO interface to wake up the host and set GAP to 0x80:
30 # Use GPIO pin #3 to wake up the host and set GAP to 0xff:
54 These commands are used to enable host sleep or wake up firmware
58 1 -- Enable host sleep
63 # Enable host sleep
90 This command display the host sleep state.
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| /Documentation/devicetree/bindings/ata/ |
| D | apm-xgene.txt | 1 * APM X-Gene 6.0 Gb/s SATA host controller nodes
3 SATA host controller nodes are defined to describe on-chip Serial ATA
11 Second memory resource shall be the host controller
13 Third memory resource shall be the host controller
15 4th memory resource shall be the host controller
17 5th optional memory resource shall be the host
19 - interrupts : Interrupt-specifier for SATA host controller IRQ.
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| /Documentation/i2c/busses/ |
| D | i2c-sis630.rst | 25 high_clock = [1|0] Forcibly set Host Master Clock to 56KHz (default,
40 00:00.0 Host bridge: Silicon Integrated Systems [SiS] 630 Host (rev 31)
45 00:00.0 Host bridge: Silicon Integrated Systems [SiS] 730 Host (rev 02)
50 00:00.0 Host bridge: Silicon Integrated Systems [SiS] 760/M760 Host (rev 02)
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| /Documentation/virt/hyperv/ |
| D | vpci.rst | 9 without intermediation by the host hypervisor. This approach
62 VMBus connection to the vPCI VSP on the Hyper-V host. That
86 domain with a host bridge. The PCI domainID is derived from
88 device. The Hyper-V host does not guarantee that these bytes
97 to the Hyper-V host over the VMBus channel as part of telling
98 the host that the device is ready to enter d0. See
100 MMIO range, the Hyper-V host intercepts the accesses and maps
104 the Hyper-V host, and uses this information to allocate MMIO
106 associated with the host bridge so that it works when generic
117 A Hyper-V host may initiate removal of a vPCI device from a
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