Searched +full:htvec +full:- +full:1 (Results 1 – 3 of 3) sorted by relevance
| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | loongson,htvec.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/interrupt-controller/loongson,htvec.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Loongson-3 HyperTransport Interrupt Vector Controller 10 - Jiaxun Yang <jiaxun.yang@flygoat.com> 13 This interrupt controller is found in the Loongson-3 family of chips for 18 const: loongson,htvec-1.0 21 maxItems: 1 24 minItems: 1 [all …]
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| D | loongson,pch-pic.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/interrupt-controller/loongson,pch-pic.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jiaxun Yang <jiaxun.yang@flygoat.com> 14 transforming interrupts from on-chip devices into HyperTransport vectorized 19 const: loongson,pch-pic-1.0 22 maxItems: 1 24 loongson,pic-base-vec: 32 interrupt-controller: true [all …]
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| D | loongson,pch-msi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/interrupt-controller/loongson,pch-msi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jiaxun Yang <jiaxun.yang@flygoat.com> 19 const: loongson,pch-msi-1.0 22 maxItems: 1 24 loongson,msi-base-vec: 32 loongson,msi-num-vecs: 37 minimum: 1 [all …]
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