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/Documentation/devicetree/bindings/spi/
Dsprd,spi-adi.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/sprd,spi-adi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Orson Zhai <orsonzhai@gmail.com>
11 - Baolin Wang <baolin.wang7@gmail.com>
12 - Chunyan Zhang <zhang.lyra@gmail.com>
15 ADI is the abbreviation of Anolog-Digital interface, which is used to access
20 ADI controller has 50 channels including 2 software read/write channels and
21 48 hardware channels to access analog chip. For 2 software read/write channels,
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/Documentation/devicetree/bindings/thermal/
Dqcom-spmi-adc-tm5.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/thermal/qcom-spmi-adc-tm5.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
9 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
11 $ref: thermal-sensor.yaml#
16 - qcom,spmi-adc-tm5
17 - qcom,spmi-adc-tm5-gen2
18 - qcom,adc-tm7 # Incomplete / subject to change
26 "#thermal-sensor-cells":
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Dqcom-spmi-adc-tm-hc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/thermal/qcom-spmi-adc-tm-hc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
9 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
11 $ref: thermal-sensor.yaml#
15 const: qcom,spmi-adc-tm-hc
23 "#thermal-sensor-cells":
26 "#address-cells":
29 "#size-cells":
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/Documentation/sound/cards/
Daudiophile-usb.rst2 Guide to using M-Audio Audiophile USB with ALSA and Jack
9 This document is a guide to using the M-Audio Audiophile USB (tm) device with
15 * v1.4 - Thibault Le Meur (2007-07-11)
17 - Added Low Endianness nature of 16bits-modes
19 - Modifying document structure
21 * v1.5 - Thibault Le Meur (2007-07-12)
22 - Added AC3/DTS passthru info
35 - This port supports 2 pairs of line-level audio inputs (1/4" TS and RCA)
36 - When the 1/4" TS (jack) connectors are connected, the RCA connectors
57 * 16-bit/48kHz ==> 4 channels in + 4 channels out
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Dcmipci.rst2 Brief Notes on C-Media 8338/8738/8768/8770 Driver
8 Front/Rear Multi-channel Playback
9 ---------------------------------
12 channels can be used for front/rear playbacks. Since there are two
13 DACs, both streams are handled independently unlike the 4/6ch multi-
16 As default, ALSA driver assigns the first PCM device (i.e. hw:0,0 for
18 (hw:0,1) is assigned to the second DAC for rear playback.
22 - The first DAC supports U8 and S16LE formats, while the second DAC
24 - The second DAC supports only two channel stereo.
44 on and "double DAC" mode. Actually I could hear separate 4 channels
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Dmaya44.rst8 keep here as reference -- tiwai
22 … programming information, so I (Rainer Zimmermann) had to find out some card-specific information …
24 This is the first testing version of the Maya44 driver released to the alsa-devel mailing list (Feb…
29 - playback and capture at all sampling rates
30 - input/output level
31 - crossmixing
32 - line/mic switch
33 - phantom power switch
34 - analogue monitor a.k.a bypass
39 - Channel 3+4 analogue - S/PDIF input switching
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/Documentation/devicetree/bindings/iio/adc/
Dqcom,spmi-vadc.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/qcom,spmi-vadc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andy Gross <agross@kernel.org>
11 - Bjorn Andersson <bjorn.andersson@linaro.org>
15 voltage. The VADC is a 15-bit sigma-delta ADC.
17 voltage. The VADC is a 16-bit sigma-delta ADC.
22 - items:
23 - const: qcom,pms405-adc
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Dmicrochip,mcp3564.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marius Cristea <marius.cristea@microchip.com>
13 Bindings for the Microchip family of 153.6 ksps, Low-Noise 16/24-Bit
14 Delta-Sigma ADCs with an SPI interface. Datasheet can be found here:
16 …s/aemDocuments/documents/MSLD/ProductDocuments/DataSheets/MCP3561-2-4-Family-Data-Sheet-DS20006181…
18 …ds/aemDocuments/documents/APID/ProductDocuments/DataSheets/MCP3561_2_4R-Data-Sheet-DS200006391C.pdf
20 …ProductDocuments/DataSheets/MCP3461-2-4-Two-Four-Eight-Channel-153.6-ksps-Low-Noise-16-Bit-Delta-S…
22 …/aemDocuments/documents/APID/ProductDocuments/DataSheets/MCP3461-2-4R-Family-Data-Sheet-DS20006404…
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/Documentation/leds/
Dleds-lp5521.rst10 Contact: Samu Onkalo (samu.p.onkalo-at-nokia.com)
13 -----------
15 LP5521 can drive up to 3 channels. Leds can be controlled directly via
16 the led class control interface. Channels have generic names:
19 All three channels can be also controlled using the engine micro programs.
25 1) Legacy interface - enginex_mode and enginex_load
46 2) Firmware interface - LP55xx common interface
48 For the details, please refer to 'firmware' section in leds-lp55xx.txt
57 - /sys/class/leds/lp5521:channel0/led_current - RW
58 - /sys/class/leds/lp5521:channel0/max_current - RO
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Dleds-lp5562.rst12 LP5562 can drive up to 4 channels. R/G/B and White.
15 All four channels can be also controlled using the engine micro programs.
17 For the details, please refer to 'firmware' section in leds-lp55xx.txt
70 Please refer to 'leds-lp55xx.txt"
112 /* setup HW resources */
117 /* Release HW resources */
Dleds-lp5523.rst9 Contact: Samu Onkalo (samu.p.onkalo-at-nokia.com)
12 -----------
13 LP5523 can drive up to 9 channels. Leds can be controlled directly via
15 The name of each channel is configurable in the platform data - name and label.
22 - /sys/class/leds/R1 (name: 'R1')
23 - /sys/class/leds/B1 (name: 'B1')
28 - /sys/class/leds/RGB:channelN (label: 'RGB', N: 0 ~ 8)
33 - /sys/class/leds/lp5523:channelN (N: 0 ~ 8)
38 1) Legacy interface - enginex_mode, enginex_load and enginex_leds
63 2) Firmware interface - LP55xx common interface
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/Documentation/devicetree/bindings/dma/stm32/
Dst,stm32-mdma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/stm32/st,stm32-mdma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The STM32 MDMA is a general-purpose direct memory access controller capable of
11 supporting 64 independent DMA channels with 256 HW requests.
13 described in the dma.txt file, using a five-cell specifier for each channel:
22 -bit 0-1: Source increment mode
26 -bit 2-3: Destination increment mode
30 -bit 8-9: Source increment offset size
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/Documentation/misc-devices/
Dapds990x.rst1 .. SPDX-License-Identifier: GPL-2.0
17 -----------
23 ALS produces raw measurement values for two channels: Clear channel
25 using clear channel only. Lux value and the threshold level on the HW
30 channels. HW threshold level is calculated from the given lux value to match
48 -----
52 RO - shows detected chip type and version
55 RW - enable / disable chip. Uses counting logic
60 RO - measured lux value
65 RO - lux0_input max value.
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/Documentation/sound/hd-audio/
Dcontrols.rst2 HD-Audio Codec-Specific Mixer Controls
6 This file explains the codec-specific mixer controls.
9 --------------
12 This is an enum control to change the surround-channel setup,
13 appears only when the surround channels are available.
14 It gives the number of channels to be used, "2ch", "4ch", "6ch",
16 jack-retasking of multi-I/O jacks.
18 Auto-Mute Mode
19 This is an enum control to change the auto-mute behavior of the
20 headphone and line-out jacks. If built-in speakers and headphone
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/Documentation/devicetree/bindings/leds/
Dqcom,spmi-flash-led.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/leds/qcom,spmi-flash-led.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Fenglin Wu <quic_fenglinw@quicinc.com>
14 The flash LED module can have different number of LED channels supported
17 ganging 2 channels together to supply maximum current up to 2 A. The current
24 - enum:
25 - qcom,pm6150l-flash-led
26 - qcom,pm8150c-flash-led
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/Documentation/networking/device_drivers/ethernet/marvell/
Docteontx2.rst1 .. SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
12 - `Overview`_
13 - `Drivers`_
14 - `Basic packet flow`_
15 - `Devlink health reporters`_
16 - `Quality of service`_
21 Resource virtualization unit (RVU) on Marvell's OcteonTX2 SOC maps HW
23 PCI-compatible physical and virtual functions. Each functional block
31 - Network pool or buffer allocator (NPA)
32 - Network interface controller (NIX)
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/Documentation/security/
Dsnp-tdx-threat-model.rst17 the kernel through various networking or limited HW-specific exposed
37 CoCo, in the virtualization context, refers to a set of HW and/or SW
48 additional mechanisms to control guest-host page mapping. More details on
49 the x86-specific solutions can be found in
51 …https://www.amd.com/system/files/techdocs/sev-snp-strengthening-vm-isolation-with-integrity-protec…
56 that acts as a security manager. The host-side virtual machine monitor
63 In the following diagram, the "<--->" lines represent bi-directional
64 communication channels or interfaces between the CoCo security manager and
67 +-------------------+ +-----------------------+
68 | CoCo guest VM |<---->| |
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/Documentation/sound/designs/
Doss-emulation.rst2 Notes on Kernel OSS-Emulation
13 as add-on kernel modules, snd-pcm-oss, snd-mixer-oss and snd-seq-oss.
18 is called. The alias is defined ``sound-service-x-y``, where x and y are
22 Only necessary step for auto-loading of OSS modules is to define the
25 alias sound-slot-0 snd-emu10k1
27 As the second card, define ``sound-slot-1`` as well.
29 ``alias sound-slot-0 snd-card-0`` doesn't work any more like the old
38 after the corresponding OSS-emulation module is loaded. Don't worry
74 PCM device (``hw:0,0`` in ALSA) is mapped to /dev/dsp and the secondary
75 device (``hw:0,1``) to /dev/adsp (if available). For MIDI, /dev/midi and
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/Documentation/ABI/testing/
Dsysfs-platform-hidma-mgmt1 What: /sys/devices/platform/hidma-mgmt*/chanops/chan*/priority
10 What: /sys/devices/platform/hidma-mgmt*/chanops/chan*/weight
17 equal priority channels during round robin scheduling.
19 What: /sys/devices/platform/hidma-mgmt*/chreset_timeout_cycles
27 then the HW will issue a reset failure interrupt. The value
31 What: /sys/devices/platform/hidma-mgmt*/dma_channels
37 Contains the number of dma channels supported by one instance
40 What: /sys/devices/platform/hidma-mgmt*/hw_version_major
48 What: /sys/devices/platform/hidma-mgmt*/hw_version_minor
56 What: /sys/devices/platform/hidma-mgmt*/max_rd_xactions
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/Documentation/devicetree/bindings/spmi/
Dqcom,x1e80100-spmi-pmic-arb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spmi/qcom,x1e80100-spmi-pmic-arb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Stephen Boyd <sboyd@kernel.org>
13 The X1E80100 SPMI PMIC Arbiter implements HW version 7 and it's an SPMI
14 controller with wrapping arbitration logic to allow for multiple on-chip
22 const: qcom,x1e80100-spmi-pmic-arb
26 - description: core registers
27 - description: tx-channel per virtual slave registers
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/Documentation/networking/device_drivers/ethernet/intel/
Diavf.rst1 .. SPDX-License-Identifier: GPL-2.0+
8 Copyright(c) 2013-2018 Intel Corporation.
13 - Overview
14 - Identifying Your Adapter
15 - Additional Configurations
16 - Known Issues/Troubleshooting
17 - Support
30 The guest OS loading the iavf driver must support MSI-X interrupts.
53 ---------------------
58 # dmesg -n 8
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/Documentation/networking/device_drivers/ethernet/freescale/
Ddpaa.rst1 .. SPDX-License-Identifier: GPL-2.0
8 - Madalin Bucur <madalin.bucur@nxp.com>
9 - Camelia Groza <camelia.groza@nxp.com>
13 - DPAA Ethernet Overview
14 - DPAA Ethernet Supported SoCs
15 - Configuring DPAA Ethernet in your kernel
16 - DPAA Ethernet Frame Processing
17 - DPAA Ethernet Features
18 - DPAA IRQ Affinity and Receive Side Scaling
19 - Debugging
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/Documentation/networking/
Dregulatory.rst1 .. SPDX-License-Identifier: GPL-2.0
15 ---------------------------------------
23 -------------------------------------------
31 ---------------------------------------------------------------
38 is CRDA - central regulatory domain agent. Its documented here:
55 --------------------------------
83 They have two options -- they either provide an alpha2 so that
101 do not need a callback as the channels registered by them are
103 channels cannot be enabled.
105 Example code - drivers hinting an alpha2:
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/Documentation/devicetree/bindings/net/wireless/
Dmediatek,mt76.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Felix Fietkau <nbd@nbd.name>
12 - Lorenzo Bianconi <lorenzo@kernel.org>
13 - Ryder Lee <ryder.lee@mediatek.com>
25 - mediatek,mt76
26 - mediatek,mt7628-wmac
27 - mediatek,mt7622-wmac
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/Documentation/admin-guide/
Dkernel-parameters.txt12 acpi= [HW,ACPI,X86,ARM64,RISCV64,EARLY]
16 force -- enable ACPI if default was off
17 on -- enable ACPI but allow fallback to DT [arm64,riscv64]
18 off -- disable ACPI if default was on
19 noirq -- do not use ACPI for IRQ routing
20 strict -- Be less tolerant of platforms that are not
22 rsdt -- prefer RSDT over (default) XSDT
23 copy_dsdt -- copy DSDT to memory
24 nospcr -- disable console in ACPI SPCR table as
39 acpi_backlight= [HW,ACPI]
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