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/Documentation/devicetree/bindings/i2c/
Di2c-demux-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-demux-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Pinctrl-based I2C Bus Demultiplexer
10 - Wolfram Sang <wsa+renesas@sang-engineering.com>
13 This binding describes an I2C bus demultiplexer that uses pin multiplexing to
14 route the I2C signals, and represents the pin multiplexing configuration
15 using the pinctrl device tree bindings. This may be used to select one I2C
17 another I2C IP core on the SoC. The most simple example is to fall back to
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Di2c-opal.txt1 Device-tree bindings for I2C OPAL driver
2 ----------------------------------------
6 perspective, the properties of use are "ibm,port-name" and "ibm,opal-id".
10 - reg: Port-id within a given master
11 - compatible: must be "ibm,opal-i2c"
12 - ibm,opal-id: Refers to a specific bus and used to identify it when calling
14 - bus-frequency: Operating frequency of the i2c bus (in HZ). Informational for
18 - ibm,port-name: Firmware provides this name that uniquely identifies the i2c
23 a P8 on-chip bus.
27 i2c-bus@0 {
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Dcdns,i2c-r1p10.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/cdns,i2c-r1p10.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cadence I2C controller
10 - Michal Simek <michal.simek@amd.com>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
18 - cdns,i2c-r1p10 # cadence i2c controller version 1.0
19 - cdns,i2c-r1p14 # cadence i2c controller version 1.4
33 clock-frequency:
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Di2c-axxia.txt1 LSI Axxia I2C
4 - compatible : Must be "lsi,api2c"
5 - reg : Offset and length of the register set for the device
6 - interrupts : the interrupt specifier
7 - #address-cells : Must be <1>;
8 - #size-cells : Must be <0>;
9 - clock-names : Must contain "i2c".
10 - clocks: Must contain an entry for each name in clock-names. See the common
14 - clock-frequency : Desired I2C bus clock frequency in Hz. If not specified,
20 i2c@2010084000 {
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/Documentation/i2c/
Di2c-sysfs.rst1 .. SPDX-License-Identifier: GPL-2.0
4 Linux I2C Sysfs
10 I2C topology can be complex because of the existence of I2C MUX
11 (I2C Multiplexer). The Linux
12 kernel abstracts the MUX channels into logical I2C bus numbers. However, there
13 is a gap of knowledge to map from the I2C bus physical number and MUX topology
14 to logical I2C bus number. This doc is aimed to fill in this gap, so the
16 the concept of logical I2C buses in the kernel, by knowing the physical I2C
17 topology and navigating through the I2C sysfs in Linux shell. This knowledge is
18 useful and essential to use ``i2c-tools`` for the purpose of development and
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Dslave-eeprom-backend.rst2 Linux I2C slave EEPROM backend
5 by Wolfram Sang <wsa@sang-engineering.com> in 2014-20
7 This backend simulates an EEPROM on the connected I2C bus. Its memory contents
10 /sys/bus/i2c/devices/<device-directory>/slave-eeprom
12 The following types are available: 24c02, 24c32, 24c64, and 24c512. Read-only
13 variants are also supported. The name needed for instantiating has the form
14 'slave-<type>[ro]'. Examples follow:
17 # echo slave-24c02 0x1064 > /sys/bus/i2c/devices/i2c-1/new_device
19 24c512, read-only, address 0x42:
20 # echo slave-24c512ro 0x1042 > /sys/bus/i2c/devices/i2c-1/new_device
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Dsummary.rst2 Introduction to I2C and SMBus
5 I²C (pronounce: I squared C and written I2C in the kernel documentation) is
6 a protocol developed by Philips. It is a two-wire protocol with variable
8 an inexpensive bus for connecting many types of devices with infrequent or
9 low bandwidth communications needs. I2C is widely used with embedded
11 and so are not advertised as being I2C but come under different names,
14 The latest official I2C specification is the `"I²C-bus specification and user
15 manual" (UM10204) <https://www.nxp.com/docs/en/user-guide/UM10204.pdf>`_
18 SMBus (System Management Bus) is based on the I2C protocol, and is mostly
19 a subset of I2C protocols and signaling. Many I2C devices will work on an
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Dwriting-clients.rst2 Implementing I2C device drivers
5 This is a small guide for those who want to write kernel drivers for I2C
19 it for non-exported symbols too. We will use the prefix ``foo_`` in this
28 routines, and should be zero-initialized except for fields with data you
29 provide. A client structure holds device-specific information like the
30 driver model device node, and its I2C address.
40 MODULE_DEVICE_TABLE(i2c, foo_idtable);
44 .name = "foo",
56 The name field is the driver name, and must not contain spaces. It
57 should match the module name (if the driver can be compiled as a module),
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Dold-module-parameters.rst2 I2C device driver binding control from user-space in old kernels
10 Up to kernel 2.6.32, many I2C drivers used helper macros provided by
11 <linux/i2c.h> which created standard module parameters to let the user
12 control how the driver would probe I2C buses and attach to devices. These
17 With the conversion of the I2C subsystem to the standard device driver
18 binding model, it became clear that these per-module parameters were no
20 sysfs-based interface is described in
21 Documentation/i2c/instantiating-devices.rst, section
22 "Method 4: Instantiate from user-space".
26 Attaching a driver to an I2C device
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/Documentation/driver-api/
Dipmb.rst5 The Intelligent Platform Management Bus or IPMB, is an
6 I2C bus that provides a standardized interconnection between
10 IPMB bus.
15 hot-swapping disk drivers in the system chassis, etc...
27 ----------------------------
29 ipmb-dev-int - This is the driver needed on a Satellite MC to
31 This driver works with the I2C driver and a userspace
34 1) It is an I2C slave backend driver. So, it defines a callback
35 function to set the Satellite MC as an I2C slave.
43 --------------------
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Di2c.rst4 I\ :sup:`2`\ C (or without fancy typography, "I2C") is an acronym for
5 the "Inter-IC" bus, a simple bus protocol which is widely used where low
7 some vendors use another name (such as "Two-Wire Interface", TWI) for
8 the same bus. I2C only needs two signals (SCL for clock, SDA for data),
10 I2C devices use seven bit addresses, and bus speeds of up to 400 kHz;
12 I2C is a multi-master bus; open drain signaling is used to arbitrate
16 The Linux I2C programming interfaces support the master side of bus
18 structured around two kinds of driver, and two kinds of device. An I2C
22 I2C bus segment it manages. On each I2C bus segment will be I2C devices
26 are functions to perform various I2C protocol operations; at this writing
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/Documentation/i2c/muxes/
Di2c-mux-gpio.rst2 Kernel driver i2c-mux-gpio
8 -----------
10 i2c-mux-gpio is an i2c mux driver providing access to I2C bus segments
11 from a master I2C bus and a hardware MUX controlled through GPIO pins.
15 ---------- ---------- Bus segment 1 - - - - -
16 | | SCL/SDA | |-------------- | |
17 | |------------| |
18 | | | | Bus segment 2 | |
19 | Linux | GPIO 1..N | MUX |--------------- Devices
20 | |------------| | | |
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/Documentation/ABI/testing/
Dsysfs-platform-i2c-demux-pinctrl1 What: /sys/devices/platform/<i2c-demux-name>/available_masters
4 Contact: Wolfram Sang <wsa+renesas@sang-engineering.com>
7 selected for a demultiplexed bus. The format is
8 "<index>:<name>". Example from a Renesas Lager board::
10 0:/i2c@e6500000 1:/i2c@e6508000
12 What: /sys/devices/platform/<i2c-demux-name>/current_master
15 Contact: Wolfram Sang <wsa+renesas@sang-engineering.com>
17 This file selects/shows the active I2C master for a demultiplexed
18 bus. It uses the <index> value from the file 'available_masters'.
/Documentation/w1/slaves/
Dw1_ds28e17.rst7 * Maxim DS28E17 1-Wire-to-I2C Master Bridge
19 -----------
20 The DS28E17 is a Onewire slave device which acts as an I2C bus master.
22 This driver creates a new I2C bus for any DS28E17 device detected. I2C buses
23 come and go as the DS28E17 devices come and go. I2C slave devices connected to
25 connected to a "native" I2C bus master.
30 SUBSYSTEM=="i2c-dev", KERNEL=="i2c-[0-9]*", ATTRS{name}=="w1-19-*", \
31 SYMLINK+="i2c-$attr{name}"
33 may be used to create stable /dev/i2c- entries based on the unique id of the
40 This sets up the default I2C speed a DS28E17 get configured for as soon
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/Documentation/leds/
Dleds-lp5562.rst17 For the details, please refer to 'firmware' section in leds-lp55xx.txt
51 echo 2 > /sys/bus/i2c/devices/xxxx/select_engine # 2 is for green channel
52 echo "RGB" > /sys/bus/i2c/devices/xxxx/engine_mux # engine mux for RGB
56 echo 1 > /sys/bus/i2c/devices/xxxx/run_engine
60 echo 1 or 2 or 3 > /sys/bus/i2c/devices/xxxx/select_engine
61 echo "W" > /sys/bus/i2c/devices/xxxx/engine_mux
65 echo 1 > /sys/bus/i2c/devices/xxxx/run_engine
70 Please refer to 'leds-lp55xx.txt"
85 .name = "R",
91 .name = "G",
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/Documentation/hwmon/
Dpcf8591.rst17 - Aurelien Jarno <aurelien@aurel32.net>
18 - valuable contributions by Jan M. Sendler <sendler@sendler.de>,
19 - Jean Delvare <jdelvare@suse.de>
23 -----------
25 The PCF8591 is an 8-bit A/D and D/A converter (4 analog inputs and one
26 analog output) for the I2C bus produced by Philips Semiconductors (now NXP).
27 It is designed to provide a byte I2C interface to up to 4 separate devices.
29 The PCF8591 has 4 analog inputs programmable as single-ended or
32 - mode 0 : four single ended inputs
35 - mode 1 : three differential inputs
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Dsbrmi.rst1 .. SPDX-License-Identifier: GPL-2.0-or-later
8 * Sideband Remote Management Interface (SB-RMI) compliant AMD SoC
15 To instantiate this driver on an AMD CPU with SB-RMI
16 support, the i2c bus number would be the bus connected from the board
22 As mentioned in AMD's APML specification, The SB-RMI address is
27 Datasheet: The SB-RMI interface and protocol along with the Advanced
31 https://www.amd.com/en/support/tech-docs?keyword=55898
36 -----------
39 (SB-RMI) module from the external SMBus master that can be used to report socket
40 power on AMD platforms using mailbox command and resembles a typical 8-pin remote
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/Documentation/i2c/busses/
Di2c-ocores.rst2 Kernel driver i2c-ocores
6 * OpenCores.org I2C controller by Richard Herveille (see datasheet link)
7 https://opencores.org/project/i2c/overview
12 -----------
14 i2c-ocores is an i2c bus driver for the OpenCores.org I2C controller
18 -----
20 i2c-ocores uses the platform bus, so you need to provide a struct
23 ocores_i2c_platform_data (see linux/platform_data/i2c-ocores.h) describing the
26 the i2c-ocores driver will add to the bus upon creation.
64 .name = "ocores-i2c",
/Documentation/devicetree/bindings/display/panel/
Dpanel-common.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/panel/panel-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
24 width-mm:
29 height-mm:
36 The label property specifies a symbolic name for the panel as a
37 string suitable for use by humans. It typically contains a name inscribed
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/Documentation/devicetree/bindings/input/touchscreen/
Dzinitix,bt400.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 are Korea-produced touchscreens with embedded microcontrollers. The
11 BT4xx series was produced 2010-2013 and the BT5xx series 2013-2014.
14 - Michael Srba <Michael.Srba@seznam.cz>
15 - Linus Walleij <linus.walleij@linaro.org>
18 - $ref: touchscreen.yaml#
19 - $ref: ../input.yaml#
27 - zinitix,bt402
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/Documentation/devicetree/bindings/gnss/
Dbrcm,bcm4751.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Johan Hovold <johan@kernel.org>
11 - Linus Walleij <linus.walleij@linaro.org>
14 Broadcom GPS chips can be used over the UART or I2C bus. The UART
15 bus requires CTS/RTS support. The number of the capsule is more
20 - $ref: gnss-common.yaml#
21 - $ref: /schemas/serial/serial-peripheral-props.yaml#
26 - brcm,bcm4751
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/Documentation/devicetree/bindings/regulator/
Dmax8893.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sergey Larin <cerg2010cerg2010@mail.ru>
14 Programming is done through I2C bus.
27 "^(ldo[1-5]|buck)$":
35 - compatible
36 - reg
37 - regulators
40 - |
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/Documentation/driver-api/i3c/
Dprotocol.rst1 .. SPDX-License-Identifier: GPL-2.0
11 everything hardware related (like how things are transmitted on the bus, how
17 https://resources.mipi.org/mipi-i3c-v1-download).
22 The I3C (pronounced 'eye-three-see') is a MIPI standardized protocol designed
23 to overcome I2C limitations (limited speed, external signals needed for
24 interrupts, no automatic detection of the devices connected to the bus, ...)
25 while remaining power-efficient.
27 I3C Bus
30 An I3C bus is made of several I3C devices and possibly some I2C devices as
33 An I3C device on the I3C bus can have one of the following roles:
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/Documentation/devicetree/bindings/mfd/
Dti,tps6594.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Julien Panis <jpanis@baylibre.com>
15 PFSM (Pre-configurable Finite State Machine) managing the state of the device.
16 TPS6594 is the super-set device while TPS6593 and LP8764 are derivatives.
21 - ti,lp8764-q1
22 - ti,tps6593-q1
23 - ti,tps6594-q1
24 - ti,tps65224-q1
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/Documentation/dev-tools/
Dgpio-sloppy-logic-analyzer.rst1 .. SPDX-License-Identifier: GPL-2.0
12 This document briefly describes how to run the GPIO based in-kernel sloppy
22 Another feature is to snoop on on-chip peripherals if the I/O cells of these
25 I2C traffic without any wiring (if your hardware supports it). In the pin
26 control subsystem such pin controllers are called "non-strict": a certain pin
31 non-deterministic code paths and non-maskable interrupts. It is called 'sloppy'
47 i2c-analyzer {
48 compatible = "gpio-sloppy-logic-analyzer";
49 probe-gpios = <&gpio6 21 GPIO_OPEN_DRAIN>, <&gpio6 4 GPIO_OPEN_DRAIN>;
50 probe-names = "SCL", "SDA";
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