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/Documentation/i2c/
Di2c-topology.rst2 I2C muxes and complex topologies
5 There are a couple of reasons for building more complex I2C topologies
6 than a straight-forward I2C bus with one adapter and one or more devices.
16 from the I2C bus, at least most of the time, and sits behind a gate
19 Several types of hardware components such as I2C muxes, I2C gates and I2C
22 These components are represented as I2C adapter trees by Linux, where
23 each adapter has a parent adapter (except the root adapter) and zero or
25 I2C transfers, and all adapters with a parent are part of an "i2c-mux"
29 an I2C transfer on one of its child adapters. The mux driver can
39 There are two variants of locking available to I2C muxes, they can be
[all …]
Di2c-address-translators.rst1 .. SPDX-License-Identifier: GPL-2.0
4 I2C Address Translators
11 -----------
13 An I2C Address Translator (ATR) is a device with an I2C slave parent
14 ("upstream") port and N I2C master child ("downstream") ports, and
16 with a modified slave address. The address used on the parent bus is
21 An ATR looks similar to an i2c-mux except:
22 - the address on the parent and child busses can be different
23 - there is normally no need to select the child port; the alias used on the
24 parent bus implies it
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/Documentation/devicetree/bindings/i2c/
Di2c-mux-gpmux.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-mux-gpmux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: General Purpose I2C Bus Mux
10 - Peter Rosin <peda@axentia.se>
13 This binding describes an I2C bus multiplexer that uses a mux controller
14 from the mux subsystem to route the I2C signals.
16 .-----. .-----.
18 .------------. '-----' '-----'
[all …]
Di2c-demux-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-demux-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Pinctrl-based I2C Bus Demultiplexer
10 - Wolfram Sang <wsa+renesas@sang-engineering.com>
13 This binding describes an I2C bus demultiplexer that uses pin multiplexing to
14 route the I2C signals, and represents the pin multiplexing configuration
15 using the pinctrl device tree bindings. This may be used to select one I2C
17 another I2C IP core on the SoC. The most simple example is to fall back to
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Di2c-mux-reg.txt1 Register-based I2C Bus Mux
3 This binding describes an I2C bus multiplexer that uses a single register
4 to route the I2C signals.
7 - compatible: i2c-mux-reg
8 - i2c-parent: The phandle of the I2C bus that this multiplexer's master-side
10 * Standard I2C mux properties. See i2c-mux.yaml in this directory.
11 * I2C child bus nodes. See i2c-mux.yaml in this directory.
14 - reg: this pair of <offset size> specifies the register to control the mux.
15 The <offset size> depends on its parent node. It can be any memory-mapped
18 - little-endian: The existence indicates the register is in little endian.
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Di2c-mpc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-mpc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: I2C-Bus adapter for MPC824x/83xx/85xx/86xx/512x/52xx SoCs
10 - Chris Packham <chris.packham@alliedtelesis.co.nz>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
18 - items:
19 - enum:
20 - mpc5200-i2c
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Di2c-atr.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-atr.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Common i2c address translator properties
10 - Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
13 An I2C Address Translator (ATR) is a device with an I2C slave parent
14 ("upstream") port and N I2C master child ("downstream") ports, and
16 with a modified slave address. The address used on the parent bus is
22 i2c-alias-pool:
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Di2c-mux-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-mux-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Pinctrl-based I2C Bus Mux
10 - Wolfram Sang <wsa@kernel.org>
13 This binding describes an I2C bus multiplexer that uses pin multiplexing to route the I2C
17 +-----+ +-----+
19 +------------------------+ +-----+ +-----+
21 | /----|------+--------+
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Di2c-arb-gpio-challenge.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-arb-gpio-challenge.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: GPIO-based I2C Arbitration Using a Challenge & Response Mechanism
10 - Doug Anderson <dianders@chromium.org>
11 - Peter Rosin <peda@axentia.se>
15 the master of an I2C bus in a multimaster situation.
18 standard I2C multi-master rules. Using GPIOs is generally useful in the case
23 * It is nonstandard (not using standard I2C multimaster)
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Di2c-mux-gpio.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-mux-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: GPIO-based I2C Bus Mux
10 - Wolfram Sang <wsa@kernel.org>
13 This binding describes an I2C bus multiplexer that uses GPIOs to route the I2C signals.
15 +-----+ +-----+
17 +------------+ +-----+ +-----+
19 | | /--------+--------+
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Dst,nomadik-i2c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/st,nomadik-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ST Microelectronics Nomadik I2C
9 description: The Nomadik I2C host controller began its life in the ST
11 STn8815. It was part of the prototype STn8500 which then became ST-Ericsson
15 - Linus Walleij <linus.walleij@linaro.org>
23 - st,nomadik-i2c
24 - mobileye,eyeq5-i2c
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Dnxp,pnx-i2c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/nxp,pnx-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP PNX I2C Controller
10 - Animesh Agarwal <animeshagarwal28@gmail.com>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
17 const: nxp,pnx-i2c
25 clock-frequency:
29 - compatible
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Dloongson,ls2x-i2c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/loongson,ls2x-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson LS2X I2C Controller
10 - Binbin Zhou <zhoubinbin@loongson.cn>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
18 - loongson,ls2k-i2c
19 - loongson,ls7a-i2c
28 - compatible
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Di2c-mux-pca954x.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-mux-pca954x.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP PCA954x I2C and compatible bus switches
10 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
13 The NXP PCA954x and compatible devices are I2C bus
17 attached to the parent bus by using the SMBus "Send Byte"
23 - enum:
24 - maxim,max7356
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Dmicrochip,corei2c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/microchip,corei2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microchip MPFS I2C Controller
10 - Daire McNamara <daire.mcnamara@microchip.com>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
18 - items:
19 - const: microchip,mpfs-i2c # Microchip PolarFire SoC compatible SoCs
20 - const: microchip,corei2c-rtl-v7 # Microchip Fabric based i2c IP core
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Dsprd,sc9860-i2c.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/i2c/sprd,sc9860-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Spreadtrum SC9860 I2C controller
10 - Orson Zhai <orsonzhai@gmail.com>
11 - Baolin Wang <baolin.wang7@gmail.com>
12 - Chunyan Zhang <zhang.lyra@gmail.com>
15 - $ref: /schemas/i2c/i2c-controller.yaml#
19 const: sprd,sc9860-i2c
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/Documentation/devicetree/bindings/input/touchscreen/
Dar1021.txt1 * Microchip AR1020 and AR1021 touchscreen interface (I2C)
4 - compatible : "microchip,ar1021-i2c"
5 - reg : I2C slave address
6 - interrupts : touch controller interrupt
11 compatible = "microchip,ar1021-i2c";
13 interrupt-parent = <&gpio3>;
/Documentation/devicetree/bindings/net/nfc/
Dst,st-nci.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/nfc/st,st-nci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
15 - st,st21nfcb-i2c
16 - st,st21nfcb-spi
17 - st,st21nfcc-i2c
19 reset-gpios:
22 ese-present:
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Dmarvell,nci.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
15 - marvell,nfc-i2c
16 - marvell,nfc-spi
17 - marvell,nfc-uart
19 hci-muxed:
30 reset-n-io:
31 $ref: /schemas/types.yaml#/definitions/phandle-array
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/Documentation/devicetree/bindings/display/tegra/
Dnvidia,tegra20-hdmi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 pattern: "^hdmi@[0-9a-f]+$"
19 - enum:
20 - nvidia,tegra20-hdmi
21 - nvidia,tegra30-hdmi
[all …]
Dnvidia,tegra124-dpaux.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra124-dpaux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 pins which can be assigned to either the DPAUX channel or to an I2C
24 pattern: "^dpaux@[0-9a-f]+$"
28 - enum:
29 - nvidia,tegra124-dpaux
[all …]
/Documentation/devicetree/bindings/mux/
Dgpio-mux.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mux/gpio-mux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: GPIO-based multiplexer controller
10 - Peter Rosin <peda@axentia.se>
22 const: gpio-mux
24 mux-gpios:
28 '#mux-control-cells':
31 '#mux-state-cells':
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/Documentation/devicetree/bindings/mfd/
D88pm860x.txt3 Required parent device properties:
4 - compatible : "marvell,88pm860x"
5 - reg : the I2C slave address for the 88pm860x chip
6 - interrupts : IRQ line for the 88pm860x chip
7 - interrupt-controller: describes the 88pm860x as an interrupt controller (has its own domain)
8 - #interrupt-cells : should be 1.
9 - The cell is the 88pm860x local IRQ number
11 Optional parent device properties:
12 - marvell,88pm860x-irq-read-clr: inicates whether interrupt status is cleared by read
13 - marvell,88pm860x-slave-addr: 88pm860x are two chips solution. <reg> stores the I2C address
[all …]
/Documentation/devicetree/bindings/iio/accel/
Dadi,adxl372.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Analog Devices ADXL372 3-Axis, +/-(200g) Digital Accelerometer
10 - Stefan Popa <stefan.popa@analog.com>
13 Analog Devices ADXL372 3-Axis, +/-(200g) Digital Accelerometer that supports
14 both I2C & SPI interfaces
20 - adi,adxl372
29 - compatible
30 - reg
[all …]
/Documentation/devicetree/bindings/input/
Ddlink,dir685-touchkeys.txt1 * D-Link DIR-685 Touchkeys
3 This is a I2C one-off touchkey controller based on the Cypress Semiconductor
7 The touchkey device node should be placed inside an I2C bus node.
10 - compatible: must be "dlink,dir685-touchkeys"
11 - reg: the I2C address of the touchkeys
12 - interrupts: reference to the interrupt number
17 compatible = "dlink,dir685-touchkeys";
19 interrupt-parent = <&gpio0>;

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