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/Documentation/devicetree/bindings/sound/
Drockchip-max98090.txt4 - compatible: "rockchip,rockchip-audio-max98090"
5 - rockchip,model: The user-visible name of this sound complex
6 - rockchip,i2s-controller: The phandle of the Rockchip I2S controller that's
10 - rockchip,audio-codec: The phandle of the MAX98090 audio codec.
11 - rockchip,headset-codec: The phandle of Ext chip for jack detection. This is
12 required if there is rockchip,audio-codec.
13 - rockchip,hdmi-codec: The phandle of HDMI device for HDMI codec.
17 /* For max98090-only board. */
19 compatible = "rockchip,rockchip-audio-max98090";
20 rockchip,model = "ROCKCHIP-I2S";
[all …]
Dingenic,aic.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Ingenic SoCs AC97 / I2S Controller (AIC)
10 - Paul Cercueil <paul@crapouillou.net>
13 - $ref: dai-common.yaml#
17 pattern: '^audio-controller@'
21 - enum:
22 - ingenic,jz4740-i2s
23 - ingenic,jz4760-i2s
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Drockchip-i2s.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/sound/rockchip-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip I2S controller
10 The I2S bus (Inter-IC sound bus) is a serial link for digital
14 - Heiko Stuebner <heiko@sntech.de>
17 - $ref: dai-common.yaml#
22 - const: rockchip,rk3066-i2s
23 - items:
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Dhisilicon,hi6210-i2s.txt1 * Hisilicon 6210 i2s controller
5 - compatible: should be one of the following:
6 - "hisilicon,hi6210-i2s"
7 - reg: physical base address of the i2s controller unit and length of
9 - interrupts: should contain the i2s interrupt.
10 - clocks: a list of phandle + clock-specifier pairs, one for each entry
11 in clock-names.
12 - clock-names: should contain following:
13 - "dacodec"
14 - "i2s-base"
[all …]
Dnvidia,tegra210-i2s.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra210-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra210 I2S Controller
10 The Inter-IC Sound (I2S) controller implements full-duplex,
11 bi-directional and single direction point-to-point serial
12 interfaces. It can interface with I2S compatible devices.
13 I2S controller can operate both in master and slave mode.
16 - Jon Hunter <jonathanh@nvidia.com>
[all …]
Dsnps,designware-i2s.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/snps,designware-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: DesignWare I2S controller
10 - Jose Abreu <joabreu@synopsys.com>
15 - items:
16 - const: canaan,k210-i2s
17 - const: snps,designware-i2s
18 - enum:
[all …]
Dnvidia,tegra20-i2s.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra20-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra20 I2S Controller
10 The I2S Controller streams synchronous serial audio data between system
11 memory and an external audio device. The controller supports the I2S Left
15 - Thierry Reding <treding@nvidia.com>
16 - Jon Hunter <jonathanh@nvidia.com>
20 const: nvidia,tegra20-i2s
[all …]
Drockchip-rt5645.txt4 - compatible: "rockchip,rockchip-audio-rt5645"
5 - rockchip,model: The user-visible name of this sound complex
6 - rockchip,i2s-controller: The phandle of the Rockchip I2S controller that's
8 - rockchip,audio-codec: The phandle of the RT5645/RT5650 audio codec
13 compatible = "rockchip,rockchip-audio-rt5645";
14 rockchip,model = "ROCKCHIP-I2S";
15 rockchip,i2s-controller = <&i2s>;
16 rockchip,audio-codec = <&rt5645>;
Dintel,keembay-i2s.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/sound/intel,keembay-i2s.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Intel KeemBay I2S
11 - Daniele Alessandrelli <daniele.alessandrelli@intel.com>
12 - Paul J. Murphy <paul.j.murphy@intel.com>
15 Intel KeemBay I2S
18 - $ref: dai-common.yaml#
23 - intel,keembay-i2s
[all …]
Dcirrus,ep9301-i2s.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/cirrus,ep9301-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cirrus EP93xx I2S Controller
10 The I2S controller is used to stream serial audio data between the external
11 I2S CODECs’, ADCs/DACs, and the ARM Core. The controller supports I2S, Left-
12 and Right-Justified DSP formats.
15 - Alexander Sverdlin <alexander.sverdlin@gmail.com>
18 - $ref: dai-common.yaml#
[all …]
Drockchip,i2s-tdm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/rockchip,i2s-tdm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip I2S/TDM Controller
10 The Rockchip I2S/TDM Controller is a Time Division Multiplexed
15 - Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
18 - $ref: dai-common.yaml#
23 - rockchip,px30-i2s-tdm
24 - rockchip,rk1808-i2s-tdm
[all …]
Dst,stm32-i2s.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/st,stm32-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 SPI/I2S Controller
10 - Olivier Moysan <olivier.moysan@foss.st.com>
13 The SPI/I2S block supports I2S/PCM protocols when configured on I2S mode.
14 Only some SPI instances support I2S.
17 - $ref: dai-common.yaml#
22 - st,stm32h7-i2s
[all …]
Dmikroe,mikroe-proto.txt1 Mikroe-PROTO audio board
4 - compatible: "mikroe,mikroe-proto"
5 - dai-format: Must be "i2s".
6 - i2s-controller: The phandle of the I2S controller.
7 - audio-codec: The phandle of the WM8731 audio codec.
9 - model: The user-visible name of this sound complex.
10 - bitclock-master: Indicates dai-link bit clock master; for details see simple-card.txt (1).
11 - frame-master: Indicates dai-link frame master; for details see simple-card.txt (1).
17 compatible = "mikroe,mikroe-proto";
19 i2s-controller = <&i2s0>;
[all …]
Dadi,axi-i2s.txt1 ADI AXI-I2S controller
7 - compatible : Must be "adi,axi-i2s-1.00.a"
8 - reg : Must contain I2S core's registers location and length
9 - clocks : Pairs of phandle and specifier referencing the controller's clocks.
10 The controller expects two clocks, the clock used for the AXI interface and
12 - clock-names : "axi" for the clock to the AXI interface, "ref" for the sample
14 - dmas: Pairs of phandle and specifier for the DMA channels that are used by
17 - dma-names : "tx" for the transmit channel, "rx" for the receive channel.
19 For more details on the 'dma', 'dma-names', 'clock' and 'clock-names' properties
21 * resource-names.txt
[all …]
Dnxp,lpc3220-i2s.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/nxp,lpc3220-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP LPC32XX I2S Controller
10 The I2S controller in LPC32XX SoCs, ASoC DAI.
13 - J.M.B. Downing <jonathan.downing@nautel.com>
14 - Piotr Wojtaszczyk <piotr.wojtaszczyk@timesys.com>
17 - $ref: dai-common.yaml#
22 - nxp,lpc3220-i2s
[all …]
Dimg,i2s-in.txt1 Imagination Technologies I2S Input Controller
5 - compatible : Compatible list, must contain "img,i2s-in"
7 - #sound-dai-cells : Must be equal to 0
9 - reg : Offset and length of the register set for the device
11 - clocks : Contains an entry for each entry in clock-names
13 - clock-names : Must include the following entry:
16 - dmas: Contains an entry for each entry in dma-names.
18 - dma-names: Must include the following entry:
19 "rx" Single DMA channel used by all active I2S channels
21 - img,i2s-channels : Number of I2S channels instantiated in the I2S in block
[all …]
Damlogic,aiu.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Amlogic AIU audio output controller
10 - Jerome Brunet <jbrunet@baylibre.com>
13 - $ref: dai-common.yaml#
17 pattern: "^audio-controller@.*"
19 "#sound-dai-cells":
24 - enum:
25 - amlogic,aiu-gxbb
[all …]
Dimg,i2s-out.txt1 Imagination Technologies I2S Output Controller
5 - compatible : Compatible list, must contain "img,i2s-out"
7 - #sound-dai-cells : Must be equal to 0
9 - reg : Offset and length of the register set for the device
11 - clocks : Contains an entry for each entry in clock-names
13 - clock-names : Must include the following entries:
17 - dmas: Contains an entry for each entry in dma-names.
19 - dma-names: Must include the following entry:
20 "tx" Single DMA channel used by all active I2S channels
22 - img,i2s-channels : Number of I2S channels instantiated in the I2S out block
[all …]
Datmel,sama5d2-i2s.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/sound/atmel,sama5d2-i2s.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Atmel I2S controller
11 - Nicolas Ferre <nicolas.ferre@microchip.com>
12 - Alexandre Belloni <alexandre.belloni@bootlin.com>
13 - Claudiu Beznea <claudiu.beznea@microchip.com>
16 Atmel I2S (Inter-IC Sound Controller) bus is the standard
21 const: atmel,sama5d2-i2s
[all …]
Dnvidia,tegra30-i2s.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra30-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra30 I2S controller
10 - Thierry Reding <treding@nvidia.com>
11 - Jon Hunter <jonathanh@nvidia.com>
16 - enum:
17 - nvidia,tegra124-i2s
18 - nvidia,tegra30-i2s
[all …]
Dsamsung,smdk5250.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Sylwester Nawrocki <s.nawrocki@samsung.com>
15 const: samsung,smdk-wm8994
17 samsung,audio-codec:
21 samsung,i2s-controller:
22 description: Phandle to the Samsung I2S controller.
26 - compatible
[all …]
Dbrcm,bcm63xx-audio.txt1 Broadcom DSL/PON BCM63xx Audio I2S controller
4 - compatible: Should be "brcm,bcm63xx-i2s".
5 - #address-cells: 32bit valued, 1 cell.
6 - #size-cells: 32bit valued, 0 cell.
7 - reg: Should contain audio registers location and length
8 - interrupts: Should contain the interrupt for the controller.
9 - clocks: Must contain an entry for each entry in clock-names.
10 Please refer to clock-bindings.txt.
11 - clock-names: One of each entry matching the clocks phandles list:
12 - "i2sclk" (generated clock) Required.
[all …]
Dallwinner,sun4i-a10-i2s.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/allwinner,sun4i-a10-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A10 I2S Controller
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
14 "#sound-dai-cells":
19 - const: allwinner,sun4i-a10-i2s
20 - const: allwinner,sun6i-a31-i2s
[all …]
Dcdns,xtfpga-i2s.txt1 Bindings for I2S controller built into xtfpga Xtensa bitstreams.
4 - compatible: shall be "cdns,xtfpga-i2s".
5 - reg: memory region (address and length) with device registers.
6 - interrupts: interrupt for the device.
7 - clocks: phandle to the clk used as master clock. I2S bus clock
12 i2s0: xtfpga-i2s@d080000 {
13 #sound-dai-cells = <0>;
14 compatible = "cdns,xtfpga-i2s";
/Documentation/devicetree/bindings/clock/
Dqcom,lcc.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm LPASS Clock & Reset Controller
10 - Bjorn Andersson <andersson@kernel.org>
15 - qcom,lcc-apq8064
16 - qcom,lcc-ipq8064
17 - qcom,lcc-mdm9615
18 - qcom,lcc-msm8960
23 clock-names:
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