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/Documentation/ABI/testing/
Dsysfs-bus-i3c1 What: /sys/bus/i3c/devices/i3c-<bus-id>
3 Contact: linux-i3c@vger.kernel.org
5 An I3C bus. This directory will contain one sub-directory per
6 I3C device present on the bus.
8 What: /sys/bus/i3c/devices/i3c-<bus-id>/current_master
10 Contact: linux-i3c@vger.kernel.org
17 What: /sys/bus/i3c/devices/i3c-<bus-id>/mode
19 Contact: linux-i3c@vger.kernel.org
21 I3C bus mode. Can be "pure", "mixed-fast" or "mixed-slow". See
22 the I3C specification for a detailed description of what each
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/Documentation/devicetree/bindings/i3c/
Di3c.yaml4 $id: http://devicetree.org/schemas/i3c/i3c.yaml#
7 title: I3C bus
14 I3C busses can be described with a node for the primary I3C controller device
15 and a set of child nodes for each I2C or I3C slave on the bus. Each of them
20 pattern: "^i3c@[0-9a-f]+$"
27 All I3C devices are supposed to support DAA (Dynamic Address Assignment),
28 and are thus discoverable. So, by default, I3C devices do not have to be
32 I3C devices.
34 Another use case for describing an I3C device in the device tree is when
35 this I3C device has a static I2C address and we want to assign it a
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Dmipi-i3c-hci.yaml4 $id: http://devicetree.org/schemas/i3c/mipi-i3c-hci.yaml#
7 title: MIPI I3C HCI
13 - $ref: /schemas/i3c/i3c.yaml#
16 MIPI I3C Host Controller Interface
18 The MIPI I3C HCI (Host Controller Interface) specification defines
19 a common software driver interface to support compliant MIPI I3C
27 https://www.mipi.org/specifications/i3c-hci
31 const: mipi-i3c-hci
46 i3c@a0000000 {
47 compatible = "mipi-i3c-hci";
Daspeed,ast2600-i3c.yaml4 $id: http://devicetree.org/schemas/i3c/aspeed,ast2600-i3c.yaml#
7 title: ASPEED AST2600 i3c controller
13 - $ref: i3c.yaml#
17 const: aspeed,ast2600-i3c
41 - description: phandle to i3c global register syscon node
42 - description: index of this i3c controller in the global register set
44 A (phandle, controller index) reference to the i3c global register set
60 i3c@2000 {
61 compatible = "aspeed,ast2600-i3c";
Dcdns,i3c-master.yaml4 $id: http://devicetree.org/schemas/i3c/cdns,i3c-master.yaml#
7 title: Cadence I3C master block
13 - $ref: i3c.yaml#
17 const: cdns,i3c-master
44 i3c@d040000 {
45 compatible = "cdns,i3c-master";
Dsnps,dw-i3c-master.yaml4 $id: http://devicetree.org/schemas/i3c/snps,dw-i3c-master.yaml#
7 title: Synopsys DesignWare I3C master block
13 - $ref: i3c.yaml#
17 const: snps,dw-i3c-master-1.00a
47 i3c@2000 {
48 compatible = "snps,dw-i3c-master-1.00a";
Dsilvaco,i3c-master.yaml4 $id: http://devicetree.org/schemas/i3c/silvaco,i3c-master.yaml#
7 title: Silvaco I3C master
13 - $ref: i3c.yaml#
17 const: silvaco,i3c-master-v1
51 i3c@a0000000 {
52 compatible = "silvaco,i3c-master-v1";
/Documentation/driver-api/i3c/
Dprotocol.rst4 I3C protocol
12 collisions are prevented, ...) please have a look at the I3C specification.
14 This document is just a brief introduction to the I3C protocol and the concepts
16 I3C specification (can be downloaded here
17 https://resources.mipi.org/mipi-i3c-v1-download).
22 The I3C (pronounced 'eye-three-see') is a MIPI standardized protocol designed
27 I3C Bus
30 An I3C bus is made of several I3C devices and possibly some I2C devices as
31 well, but let's focus on I3C devices for now.
33 An I3C device on the I3C bus can have one of the following roles:
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Ddevice-driver-api.rst4 I3C device driver API
7 .. kernel-doc:: include/linux/i3c/device.h
9 .. kernel-doc:: drivers/i3c/device.c
Dmaster-driver-api.rst4 I3C master controller driver API
7 .. kernel-doc:: drivers/i3c/master.c
9 .. kernel-doc:: include/linux/i3c/master.h
Dindex.rst4 I3C subsystem
/Documentation/translations/zh_CN/driver-api/
Dindex.rst57 * i3c/index
/Documentation/devicetree/bindings/iio/imu/
Dinvensense,icm42600.yaml16 It has a configurable host interface that supports I3C, I2C and SPI serial
/Documentation/driver-api/
Dindex.rst61 i3c/index
/Documentation/devicetree/bindings/soc/qcom/
Dqcom,geni-se.yaml15 like UART, SPI, I2C, I3C, etc. A single QUP module can provide upto 8 Serial