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/Documentation/devicetree/bindings/phy/
Dfsl,imx8mp-hdmi-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/fsl,imx8mp-hdmi-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lucas Stach <l.stach@pengutronix.de>
15 - fsl,imx8mp-hdmi-phy
20 "#clock-cells":
26 clock-names:
28 - const: apb
29 - const: ref
[all …]
Dfsl,imx8-pcie-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/fsl,imx8-pcie-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Richard Zhu <hongxing.zhu@nxp.com>
13 "#phy-cells":
18 - fsl,imx8mm-pcie-phy
19 - fsl,imx8mp-pcie-phy
27 clock-names:
29 - const: ref
[all …]
/Documentation/devicetree/bindings/clock/
Dimx8mp-audiomix.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/imx8mp-audiomix.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marek Vasut <marex@denx.de>
13 NXP i.MX8M Plus AudioMIX is dedicated clock muxing and gating IP
14 used to control Audio related clock on the SoC.
18 const: fsl,imx8mp-audio-blk-ctrl
23 power-domains:
30 clock-names:
[all …]
Dfsl,imx8m-anatop.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/fsl,imx8m-anatop.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Peng Fan <peng.fan@nxp.com>
18 - enum:
19 - fsl,imx8mm-anatop
20 - fsl,imx8mq-anatop
21 - items:
22 - enum:
[all …]
/Documentation/devicetree/bindings/sound/
Dfsl,xcvr.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Viorel Suman <viorel.suman@nxp.com>
13 NXP XCVR (Audio Transceiver) is a on-chip functional module
23 - fsl,imx8mp-xcvr
24 - fsl,imx93-xcvr
25 - fsl,imx95-xcvr
29 - description: 20K RAM for code and data
30 - description: registers space
[all …]
Dfsl,aud2htx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shengjiu Wang <shengjiu.wang@nxp.com>
14 const: fsl,imx8mp-aud2htx
24 - description: Peripheral clock
26 clock-names:
28 - const: bus
32 - description: DMA controller phandle and request line for TX
34 dma-names:
[all …]
/Documentation/devicetree/bindings/soc/imx/
Dfsl,imx8mp-hsio-blk-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mp-hsio-blk-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8MP HSIO blk-ctrl
10 - Lucas Stach <l.stach@pengutronix.de>
13 The i.MX8MP HSIO blk-ctrl is a top-level peripheral providing access to
14 the NoC and ensuring proper power sequencing of the high-speed IO
20 - const: fsl,imx8mp-hsio-blk-ctrl
21 - const: syscon
[all …]
Dfsl,imx8mp-hdmi-blk-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mp-hdmi-blk-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8MP HDMI blk-ctrl
10 - Lucas Stach <l.stach@pengutronix.de>
13 The i.MX8MP HDMMI blk-ctrl is a top-level peripheral providing access to
20 - const: fsl,imx8mp-hdmi-blk-ctrl
21 - const: syscon
26 '#power-domain-cells':
[all …]
Dfsl,imx8mp-media-blk-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mp-media-blk-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Paul Elder <paul.elder@ideasonboard.com>
13 The i.MX8MP Media Block Control (MEDIA BLK_CTRL) is a top-level peripheral
20 - const: fsl,imx8mp-media-blk-ctrl
21 - const: syscon
26 '#address-cells':
29 '#size-cells':
[all …]
/Documentation/devicetree/bindings/media/
Dnxp,dw100.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Xavier Roumegue <xavier.roumegue@oss.nxp.com>
12 description: |-
13 The Dewarp Engine provides high-performance dewarp processing for the
15 and wide angle lenses. It is implemented with a line/tile-cache based
24 - nxp,imx8mp-dw100
34 - description: The AXI clock
35 - description: The AHB clock
[all …]
Dnxp,imx8-isi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/nxp,imx8-isi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
16 number and nature is SoC-dependent. They cover both capture interfaces (MIPI
17 CSI-2 RX, HDMI RX, ...) and display engine outputs for writeback support.
22 - fsl,imx8mn-isi
23 - fsl,imx8mp-isi
24 - fsl,imx93-isi
[all …]
Drockchip-isp1.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 ---
4 $id: http://devicetree.org/schemas/media/rockchip-isp1.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Helen Koike <helen.koike@collabora.com>
19 - fsl,imx8mp-isp
20 - rockchip,px30-cif-isp
21 - rockchip,rk3399-cif-isp
30 interrupt-names:
32 - const: isp
[all …]
/Documentation/devicetree/bindings/usb/
Dfsl,imx8mp-dwc3.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/usb/fsl,imx8mp-dwc3.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: NXP iMX8MP Soc USB Controller
11 - Li Jun <jun.li@nxp.com>
15 const: fsl,imx8mp-dwc3
19 - description: Address and length of the register set for HSIO Block Control
20 - description: Address and length of the register set for the wrapper of dwc3 core on the SOC.
22 "#address-cells":
[all …]
/Documentation/devicetree/bindings/pci/
Dfsl,imx6q-pcie-ep.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie-ep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lucas Stach <l.stach@pengutronix.de>
11 - Richard Zhu <hongxing.zhu@nxp.com>
15 thus inherits all the common properties defined in snps,dw-pcie-ep.yaml.
22 - fsl,imx8mm-pcie-ep
23 - fsl,imx8mq-pcie-ep
24 - fsl,imx8mp-pcie-ep
[all …]
Dfsl,imx6q-pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lucas Stach <l.stach@pengutronix.de>
11 - Richard Zhu <hongxing.zhu@nxp.com>
15 and thus inherits all the common properties defined in snps,dw-pcie.yaml.
19 See fsl,imx6q-pcie-ep.yaml for details on the Endpoint mode device tree
25 - fsl,imx6q-pcie
26 - fsl,imx6sx-pcie
[all …]
/Documentation/devicetree/bindings/display/bridge/
Dfsl,imx8mp-hdmi-tx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8mp-hdmi-tx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lucas Stach <l.stach@pengutronix.de>
17 - $ref: /schemas/display/bridge/synopsys,dw-hdmi.yaml#
22 - fsl,imx8mp-hdmi-tx
24 reg-io-width:
30 clock-names:
32 - const: iahb
[all …]
Dfsl,ldb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marek Vasut <marex@denx.de>
14 for configuring the on-SoC DPI-to-LVDS serializer. This describes
20 - fsl,imx6sx-ldb
21 - fsl,imx8mp-ldb
22 - fsl,imx93-ldb
27 clock-names:
33 reg-names:
[all …]
/Documentation/devicetree/bindings/net/
Dnxp,dwmac-imx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/nxp,dwmac-imx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Clark Wang <xiaoning.wang@nxp.com>
11 - Shawn Guo <shawnguo@kernel.org>
12 - NXP Linux Team <linux-imx@nxp.com>
20 - nxp,imx8mp-dwmac-eqos
21 - nxp,imx8dxl-dwmac-eqos
22 - nxp,imx93-dwmac-eqos
[all …]
/Documentation/devicetree/bindings/display/
Dfsl,lcdif.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marek Vasut <marex@denx.de>
11 - Stefan Agner <stefan@agner.ch>
19 - enum:
20 - fsl,imx23-lcdif
21 - fsl,imx28-lcdif
22 - fsl,imx6sx-lcdif
23 - fsl,imx8mp-lcdif
[all …]
/Documentation/devicetree/bindings/dsp/
Dfsl,dsp.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Daniel Baluta <daniel.baluta@nxp.com>
11 - Shengjiu Wang <shengjiu.wang@nxp.com>
15 advanced pre- and post- audio processing.
20 - fsl,imx8qxp-dsp
21 - fsl,imx8qm-dsp
22 - fsl,imx8mp-dsp
23 - fsl,imx8ulp-dsp
[all …]
/Documentation/devicetree/bindings/remoteproc/
Dfsl,imx-rproc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/fsl,imx-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX Co-Processor
10 This binding provides support for ARM Cortex M4 Co-processor found on some NXP iMX SoCs.
13 - Peng Fan <peng.fan@nxp.com>
18 - fsl,imx6sx-cm4
19 - fsl,imx7d-cm4
20 - fsl,imx7ulp-cm4
[all …]
/Documentation/devicetree/bindings/interrupt-controller/
Dfsl,irqsteer.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/fsl,irqsteer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lucas Stach <l.stach@pengutronix.de>
15 - const: fsl,imx-irqsteer
16 - items:
17 - enum:
18 - fsl,imx8m-irqsteer
19 - fsl,imx8mp-irqsteer
[all …]
/Documentation/devicetree/bindings/interconnect/
Dfsl,imx8m-noc.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/interconnect/fsl,imx8m-noc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Peng Fan <peng.fan@nxp.com>
13 The i.MX SoC family has multiple buses for which clock frequency (and
18 for normal (non-secure) world.
20 The buses are based on externally licensed IPs such as ARM NIC-301 and
27 - items:
28 - enum:
[all …]
/Documentation/devicetree/bindings/watchdog/
Dfsl-imx-wdt.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/watchdog/fsl-imx-wdt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
11 - Sascha Hauer <s.hauer@pengutronix.de>
12 - Fabio Estevam <festevam@gmail.com>
17 - const: fsl,imx21-wdt
18 - items:
19 - enum:
[all …]
/Documentation/devicetree/bindings/mmc/
Dfsl-imx-esdhc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/fsl-imx-esdhc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
13 - $ref: sdhci-common.yaml#
20 by mmc.txt and the properties used by the sdhci-esdhc-imx driver.
25 - enum:
26 - fsl,imx25-esdhc
27 - fsl,imx35-esdhc
[all …]

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