Searched +full:in +full:- +full:masks (Results 1 – 25 of 59) sorted by relevance
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| /Documentation/devicetree/bindings/usb/ |
| D | brcm,usb-pinmap.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/brcm,usb-pinmap.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Al Cooper <alcooperx@gmail.com>
15 - const: brcm,usb-pinmap
22 description: Interrupt for signals mirrored to out-gpios.
24 in-gpios:
29 brcm,in-functions:
30 $ref: /schemas/types.yaml#/definitions/string-array
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| /Documentation/devicetree/bindings/sound/ |
| D | tdm-slot.txt | 6 dai-tdm-slot-num : Number of slots in use.
7 dai-tdm-slot-width : Width in bits for each slot.
8 dai-tdm-slot-tx-mask : Transmit direction slot mask, optional
9 dai-tdm-slot-rx-mask : Receive direction slot mask, optional
12 dai-tdm-slot-num = <2>;
13 dai-tdm-slot-width = <8>;
14 dai-tdm-slot-tx-mask = <0 1>;
15 dai-tdm-slot-rx-mask = <1 0>;
20 tx and rx masks.
22 For snd_soc_of_xlate_tdm_slot_mask(), the tx and rx masks will use a 1 bit
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| D | amlogic,axg-sound-card.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/amlogic,axg-sound-card.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jerome Brunet <jbrunet@baylibre.com>
13 - $ref: sound-card-common.yaml#
17 const: amlogic,axg-sound-card
19 audio-aux-devs:
20 $ref: /schemas/types.yaml#/definitions/phandle-array
23 audio-widgets:
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| D | wlf,wm8994.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
11 - patches@opensource.cirrus.com
25 - wlf,wm1811
26 - wlf,wm8994
27 - wlf,wm8958
36 clock-names:
39 - const: MCLK1
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| /Documentation/filesystems/ |
| D | adfs.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 Acorn Disc Filing System - ADFS
8 -----------------------------
12 - new maps
13 - new directories or big directories
15 In terms of the named formats, this means we support:
17 - E and E+, with or without boot block
18 - F and F+
32 ----------------------
35 uid=nnn All files in the partition will be owned by
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| /Documentation/devicetree/bindings/dma/stm32/ |
| D | st,stm32-mdma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/stm32/st,stm32-mdma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The STM32 MDMA is a general-purpose direct memory access controller capable of
13 described in the dma.txt file, using a five-cell specifier for each channel:
22 -bit 0-1: Source increment mode
26 -bit 2-3: Destination increment mode
30 -bit 8-9: Source increment offset size
32 0x1: half-word (16bit)
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| /Documentation/devicetree/bindings/soc/nuvoton/ |
| D | nuvoton,npcm-gcr.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/soc/nuvoton/nuvoton,npcm-gcr.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Global Control Registers block in Nuvoton SoCs
10 - Jonathan Neuschäfer <j.neuschaefer@gmx.net>
11 - Tomer Maimon <tmaimon77@gmail.com>
14 The Global Control Registers (GCR) are a block of registers in Nuvoton SoCs
21 - enum:
22 - nuvoton,wpcm450-gcr
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| /Documentation/devicetree/bindings/mfd/ |
| D | palmas.txt | 3 The TI palmas family current members :-
12 - compatible : Should be from the list
23 - interrupt-controller : palmas has its own internal IRQs
24 - #interrupt-cells : should be set to 2 for IRQ number and flags
26 The second cell is the flags, encoded as the trigger masks from
27 Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
30 ti,mux-padX : set the pad register X (1-2) to the correct muxing for the
31 hardware, if not set will use muxing in OTP.
38 interrupt-parent = <&intc>;
39 interrupt-controller;
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| D | wm831x.txt | 7 - compatible : One of the following chip-specific strings:
16 - reg : I2C slave address when connected using I2C, chip select number
19 - gpio-controller : Indicates this device is a GPIO controller.
20 - #gpio-cells : Must be 2. The first cell is the pin number and the
23 - interrupts : The interrupt line the IRQ signal for the device is
26 - interrupt-controller : wm831x devices contain interrupt controllers and
28 - #interrupt-cells: Must be 2. The first cell is the IRQ number, and the
29 second cell is the flags, encoded as the trigger masks from
30 ../interrupt-controller/interrupts.txt
32 Optional sub-nodes:
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| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | st,spear3xx-shirq.txt | 8 exceeding 4. The number of devices in a group can differ, further they
10 bit masks. Also in some cases the group may not have enable or other
13 A single node in the device tree is used to describe the shared
14 interrupt multiplexor (one node for all groups). A group in the
16 For example, a 32-bit interrupt enable/disable config register can
20 - compatible: should be, either of
21 - "st,spear300-shirq"
22 - "st,spear310-shirq"
23 - "st,spear320-shirq"
24 - interrupt-controller: Identifies the node as an interrupt controller.
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| /Documentation/arch/riscv/ |
| D | vector.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 Vector Extension Support for RISC-V Linux
7 This document briefly outlines the interface provided to userspace by Linux in
8 order to support the use of the RISC-V Vector Extension.
11 ---------------------
14 status for the use of Vector in userspace. The intended usage guideline for
17 recommended in libraries routines because libraries should not override policies
19 are not portable to non-Linux, nor non-RISC-V environments, so it is discourage
20 to use in a portable code. To get the availability of V in an ELF program,
21 please read :c:macro:`COMPAT_HWCAP_ISA_V` bit of :c:macro:`ELF_HWCAP` in the
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| /Documentation/devicetree/bindings/clock/ |
| D | nxp,imx95-display-master-csr.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/nxp,imx95-display-master-csr.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Peng Fan <peng.fan@nxp.com>
15 - const: nxp,imx95-display-master-csr
16 - const: syscon
21 power-domains:
27 '#clock-cells':
31 ID in its "clocks" phandle cell. See
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| /Documentation/arch/arm64/ |
| D | pointer-authentication.rst | 2 Pointer authentication in AArch64 Linux
7 Date: 2017-07-19
10 functionality in AArch64 Linux.
14 ---------------------
23 held in system registers.
27 of high-order bits of the pointer, which varies dependent on the
28 configured virtual address size and whether pointer tagging is in use.
31 encoding space. In the absence of the extension (or when disabled),
36 The extension provides five separate keys to generate PACs - two for
42 -------------
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| /Documentation/arch/s390/ |
| D | vfio-ap.rst | 11 linux system running in an IBM Z system LPAR.
13 The AP adapter cards are exposed via the AP bus. The motivation for vfio-ap
28 assigned to the LPAR in which a linux host is running will be available to
36 in the LPAR, the AP bus detects the AP adapter cards assigned to the LPAR and
44 Symbolic links to these devices will also be created in the AP bus devices
45 sub-directory::
58 encryption. A domain is classified in one of two ways depending upon how it
70 is IPL'd in the LPAR, the AP bus module detects the AP usage and control
74 represented in a bitmask and stored in a sysfs file
75 /sys/bus/ap/ap_control_domain_mask. The bits in the mask, from most to least
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| /Documentation/admin-guide/perf/ |
| D | arm-ccn.rst | 5 CCN-504 is a ring-bus interconnect consisting of 11 crosspoints
11 -----------------
15 in sysfs, see /sys/bus/event_source/devices/ccn*.
29 Crosspoint watchpoint-based events (special "event" value 0xfe)
34 Masks are defined separately from the event description
35 (due to limited number of the config values) in the "cmp_mask"
45 request the events on this processor (if not, the perf_event->cpu value
46 will be overwritten anyway). In case of this processor being offlined,
57 / # perf stat -a -e ccn/cycles/,ccn/xp_valid_flit,xp=1,port=0,vc=1,dir=1/ \
61 not work. Per-task (without "-a") perf sessions are not supported.
|
| /Documentation/core-api/ |
| D | padata.rst | 1 .. SPDX-License-Identifier: GPL-2.0
9 Padata is a mechanism by which the kernel can farm jobs out to be done in
23 ------------
25 The first step in using padata to run serialized jobs is to set up a
43 ------------------
45 The CPUs used to run jobs can be changed in two ways, programmatically with
53 submitted to this instance in parallel and a serial cpumask defines which
58 live in /sys/kernel/pcrypt/<instance-name>. Within an instance's directory
64 Reading one of these files shows the user-supplied cpumask, which may be
67 Padata maintains two pairs of cpumasks internally, the user-supplied cpumasks
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| D | gfp_mask-from-fs-io.rst | 4 GFP masks used from FS/IO context
13 Code paths in the filesystem and IO stacks must be careful when
16 already held resources (e.g. locks - most commonly those used for the
20 respectively __GFP_IO (note the latter implies clearing the first as well) in
23 abuses when the restricted gfp mask is used "just in case" without a
25 of GFP_NOFS/GFP_NOIO can lead to memory over-reclaim or other memory
36 mask so no memory allocation can recurse back in the FS/IO.
38 .. kernel-doc:: include/linux/sched/mm.h
40 .. kernel-doc:: include/linux/sched/mm.h
44 any critical section with respect to the reclaim is started - e.g.
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| /Documentation/filesystems/spufs/ |
| D | spu_run.rst | 1 .. SPDX-License-Identifier: GPL-2.0
10 spu_run - execute an spu context
25 Cell Broadband Engine Architecture in order to access Synergistic Pro-
26 cessor Units (SPUs). It uses the fd that was returned from spu_cre-
27 ate(2) to address a specific SPU context. When the context gets sched-
29 passed in npc.
32 not return while the SPU is still running. If there is a need to exe-
33 cute SPU code in parallel with other code on either the main CPU or
42 gets filled when spu_run returns. It can be one of the following con-
54 If NULL is passed as the event argument, these errors will result in a
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| /Documentation/devicetree/bindings/powerpc/opal/ |
| D | power-mgt.txt | 1 IBM Power-Management Bindings
6 node @power-mgt in the device-tree by the firmware.
9 ----------------
12 - name: The name of the idle state as defined by the firmware.
14 - flags: indicating some aspects of this idle states such as the
15 extent of state-loss, whether timebase is stopped on this
18 - exit-latency: The latency involved in transitioning the state of the
21 - target-residency: The minimum time that the CPU needs to reside in
22 this idle state in order to accrue power-savings
26 ----------------
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| /Documentation/driver-api/rapidio/ |
| D | mport_cdev.rst | 13 devices directly to applications, in a manner that allows the numerous and
17 for user-space applications. Most of RapidIO operations are supported through
20 When loaded this device driver creates filesystem nodes named rio_mportX in /dev
21 directory for each registered RapidIO mport device. 'X' in the node name matches
24 Using available set of ioctl commands user-space applications can perform
27 - Reads and writes from/to configuration registers of mport devices
29 - Reads and writes from/to configuration registers of remote RapidIO devices.
30 This operations are defined as RapidIO Maintenance reads/writes in RIO spec.
32 - Set RapidIO Destination ID for mport devices (RIO_MPORT_MAINT_HDID_SET)
33 - Set RapidIO Component Tag for mport devices (RIO_MPORT_MAINT_COMPTAG_SET)
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| D | rio_cm.rst | 16 to applications, in a manner that allows the numerous and varied RapidIO
19 This driver (RIO_CM) provides to user-space applications shared access to
23 messaging mailboxes in case of multi-packet message (up to 4KB) and
24 up to 64 mailboxes if single-packet messages (up to 256 B) are used. In addition
30 capability to large number of user-space processes by introducing socket-like
37 in /dev directory common for all registered RapidIO mport devices.
39 Following ioctl commands are available to user-space applications:
41 - RIO_CM_MPORT_GET_LIST:
44 Each list entry is combination of mport's index in the system and RapidIO
46 - RIO_CM_EP_GET_LIST_SIZE:
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| D | tsi721.rst | 2 RapidIO subsystem mport driver for IDT Tsi721 PCI Express-to-SRIO bridge.
10 doorbells, inbound maintenance port-writes and RapidIO messaging.
14 destination IDs without need for changes in outbound window translation.
23 - 'dbg_level'
24 - This parameter allows to control amount of debug information
26 This parameter can be changed bit masks that correspond to the specific
32 - 'dma_desc_per_channel'
33 - This parameter defines number of hardware buffer
37 - 'dma_txqueue_sz'
38 - DMA transactions queue size. Defines number of pending
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| /Documentation/sound/designs/ |
| D | tracepoints.rst | 2 Tracepoints in ALSA
8 Tracepoints in ALSA PCM core
19 ------------------------------------
25 -----------------------------------------------------
30 In a design of ALSA PCM core, data transmission is abstracted as PCM substream.
33 substream. In this procedure, PCM hardware parameters are decided by
37 The parameters are described in struct snd_pcm_hw_params. This
48 ``masks``
49 Configurable. This type of parameter is described in
53 - SNDRV_PCM_HW_PARAM_ACCESS
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| /Documentation/w1/slaves/ |
| D | w1_therm.rst | 16 -----------
36 displays the retained values along with a temperature in millidegrees
40 returns only the temperature in millidegrees Centigrade.
46 in the module), it will drive the line high during the longer conversion
49 -1 if at least one sensor still in conversion, 1 if conversion is complete
52 may return empty if conversion is still in progress. Note that if a bulk
64 correct conversion time by writing a value in milliseconds to ``conv_time``; 2)
67 completion. Options 2, 3 can't be used in parasite power mode. To get back to
70 Writing a resolution value (in bits) to ``w1_slave`` will change the
72 the sensor. Resolution is reset when the sensor gets power-cycled.
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| /Documentation/arch/x86/ |
| D | resctrl.rst | 1 .. SPDX-License-Identifier: GPL-2.0
9 :Authors: - Fenghua Yu <fenghua.yu@intel.com>
10 - Tony Luck <tony.luck@intel.com>
11 - Vikas Shivappa <vikas.shivappa@intel.com>
31 Historically, new features were made visible by default in /proc/cpuinfo. This
32 resulted in the feature flags becoming hard to parse by humans. Adding a new
38 # mount -t resctrl resctrl [-o cdp[,cdpl2][,mba_MBps][,debug]] /sys/fs/resctrl
43 Enable code/data prioritization in L3 cache allocations.
45 Enable code/data prioritization in L2 cache allocations.
48 bandwidth in MiBps
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