Searched +full:init +full:- +full:gpios (Results 1 – 13 of 13) sorted by relevance
| /Documentation/devicetree/bindings/fpga/ |
| D | xlnx,fpga-selectmap.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/fpga/xlnx,fpga-selectmap.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Charles Perry <charles.perry@savoirfairelinux.com> 22 - $ref: /schemas/memory-controllers/mc-peripheral-props.yaml# 27 - xlnx,fpga-xc7s-selectmap 28 - xlnx,fpga-xc7a-selectmap 29 - xlnx,fpga-xc7k-selectmap 30 - xlnx,fpga-xc7v-selectmap [all …]
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| D | xlnx,fpga-slave-serial.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/fpga/xlnx,fpga-slave-serial.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Nava kishore Manne <nava.kishore.manne@amd.com> 13 Xilinx Spartan-6 and 7 Series FPGAs support a method of loading the bitstream 21 https://www.xilinx.com/support/documentation/application_notes/xapp583-fpga-configuration.pdf 24 - $ref: /schemas/spi/spi-peripheral-props.yaml# 29 - xlnx,fpga-slave-serial 31 spi-cpha: true [all …]
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| D | lattice,sysconfig.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Vladimir Georgiev <v.georgiev@metrotek.ru> 23 - lattice,sysconfig-ecp5 28 program-gpios: 34 init-gpios: 40 done-gpios: 47 - compatible 48 - reg [all …]
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| /Documentation/devicetree/bindings/net/ |
| D | mdio-mux-gpio.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/net/mdio-mux-gpio.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Andrew Lunn <andrew@lunn.ch> 17 - $ref: /schemas/net/mdio-mux.yaml# 21 const: mdio-mux-gpio 23 gpios: 25 List of GPIOs used to control the multiplexer, least significant bit first. 30 - compatible [all …]
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| /Documentation/devicetree/bindings/display/panel/ |
| D | samsung,s6e8aa0.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Andrzej Hajda <a.hajda@samsung.com> 13 - $ref: panel-common.yaml# 22 reset-gpios: true 23 display-timings: true 25 vdd3-supply: 28 vci-supply: 31 power-on-delay: [all …]
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| /Documentation/sound/soc/ |
| D | machine.rst | 7 relationships between each component which include audio paths, GPIOs, 12 the following struct:- 33 /* CPU <--> Codec DAI links */ 41 ---------------- 46 ------------------ 53 ------------------------- 62 /* corgi digital audio interface glue - connects codec <--> CPU */ 66 .cpu_dai_name = "pxa-is2-dai", 67 .codec_dai_name = "wm8731-hifi", 68 .platform_name = "pxa-pcm-audio", [all …]
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| /Documentation/devicetree/bindings/gpio/ |
| D | ti,omap-gpio.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/gpio/ti,omap-gpio.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Grygorii Strashko <grygorii.strashko@ti.com> 13 The general-purpose interface combines general-purpose input/output (GPIO) banks. 14 Each GPIO banks provides up to 32 dedicated general-purpose pins with input 15 and output capabilities; interrupt generation in active mode and wake-up 21 - enum: 22 - ti,omap2-gpio [all …]
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| /Documentation/devicetree/bindings/phy/ |
| D | phy-rockchip-usbdp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/phy-rockchip-usbdp.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Frank Wang <frank.wang@rock-chips.com> 11 - Zhang Yubing <yubing.zhang@rock-chips.com> 16 - rockchip,rk3588-usbdp-phy 21 "#phy-cells": 24 - PHY_TYPE_USB3 25 - PHY_TYPE_DP [all …]
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| /Documentation/devicetree/bindings/input/ |
| D | ti,drv260x.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Texas Instruments - drv260x Haptics driver family 10 - Andrew Davis <afd@ti.com> 15 - ti,drv2604 16 - ti,drv2605 17 - ti,drv2605l 22 vbat-supply: 30 (defined in include/dt-bindings/input/ti-drv260x.h) [all …]
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| /Documentation/devicetree/bindings/sound/ |
| D | cirrus,cs42l42.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - patches@opensource.cirrus.com 13 The CS42L42 is a low-power audio codec designed for portable applications. 14 It provides a high-dynamic range, stereo DAC for audio playback and a mono 15 high-dynamic-range ADC for audio capture. There is an integrated headset 21 - cirrus,cs42l42 22 - cirrus,cs42l83 29 VP-supply: [all …]
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| /Documentation/devicetree/bindings/memory-controllers/ |
| D | ti,gpmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/memory-controllers/ti,gpmc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Tony Lindgren <tony@atomide.com> 11 - Roger Quadros <rogerq@kernel.org> 16 - Asynchronous SRAM-like memories and ASICs 17 - Asynchronous, synchronous, and page mode burst NOR flash 18 - NAND flash 19 - Pseudo-SRAM devices [all …]
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| /Documentation/driver-api/ |
| D | pps.rst | 1 .. SPDX-License-Identifier: GPL-2.0 4 PPS - Pulse Per Second 22 -------- 32 Carrier Detect pin) or to a parallel port (ACK-pin) or to a special 33 CPU's GPIOs (this is the common case in embedded systems) but in each 38 GPS receiver as PPS source, to obtain a wallclock-time with 39 sub-millisecond synchronisation to UTC. 43 ------------------ 46 CPU GPIO-Pin as physical link to the signal, I encountered a deeper 56 purpose GPIO line. In this case even basic file-related functionality [all …]
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| /Documentation/hwmon/ |
| D | lm93.rst | 10 Addresses scanned: I2C 0x2c-0x2e 18 Addresses scanned: I2C 0x2c-0x2e 24 - Mark M. Hoffman <mhoffman@lightlink.com> 25 - Ported to 2.6 by Eric J. Bowersox <ericb@aspsys.com> 26 - Adapted to 2.6.20 by Carsten Emde <ce@osadl.org> 27 - Modified for mainline integration by Hans J. Koch <hjk@hansjkoch.de> 30 ----------------- 32 * init: integer 33 Set to non-zero to force some initializations (default is 0). 38 Configures in7 and in8 limit type, where 0 means absolute and non-zero [all …]
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