Searched +full:input +full:- +full:enable (Results 1 – 25 of 435) sorted by relevance
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | starfive,jh7100-pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/starfive,jh7100-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 Bindings for the JH7100 RISC-V SoC from StarFive Ltd.
15 interesting 2-layered approach to pin muxing best illustrated by the diagram
21 LCD output -----------------| |
22 CMOS Camera interface ------| |--- PAD_GPIO[0]
23 Ethernet PHY interface -----| MUX |--- PAD_GPIO[1]
25 | |--- PAD_GPIO[63]
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| D | nxp,lpc1850-scu.txt | 2 --------------------------------------------------------
5 - compatible : Should be "nxp,lpc1850-scu"
6 - reg : Address and length of the register set for the device
7 - clocks : Clock specifier (see clock bindings for details)
9 The lpc1850-scu driver uses the generic pin multiplexing and generic pin
10 configuration documented in pinctrl-bindings.txt.
13 - function
14 - pins
15 - bias-disable
16 - bias-pull-up
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| D | sprd,pinctrl.txt | 16 of them, so we can not make every Spreadtrum-special configuration
35 - input-enable
36 - input-disable
37 - output-high
38 - output-low
39 - bias-pull-up
40 - bias-pull-down
46 and set the pin sleep related configuration as "input-enable", which
48 input enable automatically.
54 "sprd,sleep-mode" property to set pin sleep mode.
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| D | pincfg-node.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/pincfg-node.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
21 bias-disable:
25 bias-high-impedance:
27 description: high impedance mode ("third-state", "floating")
29 bias-bus-hold:
33 bias-pull-up:
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| D | starfive,jh7110-sys-pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/starfive,jh7110-sys-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 Bindings for the JH7110 RISC-V SoC from StarFive Technology Ltd.
21 - Jianlong Huang <jianlong.huang@starfivetech.com>
25 const: starfive,jh7110-sys-pinctrl
39 interrupt-controller: true
41 '#interrupt-cells':
44 gpio-controller: true
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| D | starfive,jh7110-aon-pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/starfive,jh7110-aon-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 Bindings for the JH7110 RISC-V SoC from StarFive Technology Ltd.
18 - Jianlong Huang <jianlong.huang@starfivetech.com>
22 const: starfive,jh7110-aon-pinctrl
33 interrupt-controller: true
35 '#interrupt-cells':
38 gpio-controller: true
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| D | sprd,sc9860-pinctrl.txt | 7 - compatible: Must be "sprd,sc9860-pinctrl".
8 - reg: The register address of pin controller device.
9 - pins : An array of strings, each string containing the name of a pin.
12 - function: A string containing the name of the function, values must be
14 - drive-strength: Drive strength in mA. Supported values: 2, 4, 6, 8, 10,
16 - input-schmitt-disable: Enable schmitt-trigger mode.
17 - input-schmitt-enable: Disable schmitt-trigger mode.
18 - bias-disable: Disable pin bias.
19 - bias-pull-down: Pull down on pin.
20 - bias-pull-up: Pull up on pin. Supported values: 20000 for pull-up resistor
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| D | microchip,pic32-pinctrl.txt | 3 Please refer to pinctrl-bindings.txt, ../gpio/gpio.txt, and
4 ../interrupt-controller/interrupts.txt for generic information regarding
12 - compatible: "microchip,pic32mada-pinctrl"
13 - reg: Address range of the pinctrl registers.
14 - clocks: Clock specifier (see clock bindings for details)
16 Required properties for pin configuration sub-nodes:
17 - pins: List of pins to which the configuration applies.
19 Optional properties for pin configuration sub-nodes:
20 ----------------------------------------------------
21 - function: Mux function for the specified pins.
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| D | nvidia,tegra-pinmux-common.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra-pinmux-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
14 Please refer to pinctrl-bindings.txt in this directory for details of the
22 pin configuration parameters, such as pull-up, tristate, drive strength,
46 $ref: /schemas/types.yaml#/definitions/string-array
57 description: Pull-down/up setting to apply to the pin.
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| /Documentation/devicetree/bindings/mfd/ |
| D | as3722.txt | 4 -------------------
5 - compatible: Must be "ams,as3722".
6 - reg: I2C device address.
7 - interrupt-controller: AS3722 has internal interrupt controller which takes the
8 interrupt request from internal sub-blocks like RTC, regulators, GPIOs as well
9 as external input.
10 - #interrupt-cells: Should be set to 2 for IRQ number and flags.
12 of AS3722 are defined at dt-bindings/mfd/as3722.h
14 interrupts.txt, using dt-bindings/irq.
17 --------------------
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| D | tps65910.txt | 4 - compatible: "ti,tps65910" or "ti,tps65911"
5 - reg: I2C slave address
6 - interrupts: the interrupt outputs of the controller
7 - #gpio-cells: number of cells to describe a GPIO, this should be 2.
10 - gpio-controller: mark the device as a GPIO controller
11 - #interrupt-cells: the number of cells to describe an IRQ, this should be 2.
14 Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
15 - regulators: This is the list of child nodes that specify the regulator
20 The regulator is matched with the regulator-compatible.
22 The valid regulator-compatible values are:
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| /Documentation/ABI/testing/ |
| D | configfs-usb-gadget-uac2 | 1 What: /config/usb-gadget/gadget/functions/uac2.name
9 c_srate list of capture sampling rates (comma-separated)
11 c_hs_bint capture bInterval for HS/SS (1-4: fixed, 0: auto)
14 c_mute_present capture mute control enable
15 c_volume_present capture volume control enable
24 p_srate list of playback sampling rates (comma-separated)
26 p_hs_bint playback bInterval for HS/SS (1-4: fixed, 0: auto)
27 p_mute_present playback mute control enable
28 p_volume_present playback volume control enable
35 req_number the number of pre-allocated requests
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| D | sysfs-bus-iio-adc-mcp3564 | 3 Contact: linux-iio@vger.kernel.org
6 circuit of the Delta-Sigma modulator. The different BOOST
12 Contact: linux-iio@vger.kernel.org
15 the current biasing circuit of the Delta-Sigma modulator.
19 Contact: linux-iio@vger.kernel.org
21 This attribute is used to enable the analog input multiplexer
22 auto-zeroing algorithm (the input multiplexer and the ADC
26 input as VIN+/VIN-, one with VIN+/VIN- inverted. In this case the
30 ultra-low offset without any digital calibration. The resulting
35 Write '1' to enable it, write '0' to disable it.
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| D | configfs-usb-gadget-uac1 | 1 What: /config/usb-gadget/gadget/functions/uac1.name
9 c_srate list of capture sampling rates (comma-separated)
11 c_mute_present capture mute control enable
12 c_volume_present capture volume control enable
20 p_srate list of playback sampling rates (comma-separated)
22 p_mute_present playback mute control enable
23 p_volume_present playback volume control enable
30 req_number the number of pre-allocated requests
33 p_it_name playback input terminal name
37 c_it_name capture input terminal name
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| /Documentation/devicetree/bindings/iio/addac/ |
| D | adi,ad74115.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Cosmin Tanislav <cosmin.tanislav@analog.com>
13 The AD74115H is a single-channel software configurable input/output
15 analog output, analog input, digital output, digital input, resistance
17 chip solution with an SPI interface. The device features a 16-bit ADC and a
18 14-bit DAC.
25 - adi,ad74115h
30 spi-max-frequency:
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| /Documentation/devicetree/bindings/leds/backlight/ |
| D | mediatek,mt6370-backlight.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/leds/backlight/mediatek,mt6370-backlight.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - ChiaEn Wu <chiaen_wu@richtek.com>
21 - $ref: common.yaml#
26 - mediatek,mt6370-backlight
27 - mediatek,mt6372-backlight
29 default-brightness:
32 max-brightness:
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| /Documentation/devicetree/bindings/power/supply/ |
| D | summit,smb347-charger.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/supply/summit,smb347-charger.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - David Heidelberg <david@ixit.cz>
11 - Dmitry Osipenko <digetx@gmail.com>
16 - summit,smb345
17 - summit,smb347
18 - summit,smb358
26 monitored-battery:
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| /Documentation/devicetree/bindings/sound/ |
| D | nuvoton,nau8821.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Seven Lee <wtli@nuvoton.com>
13 - $ref: dai-common.yaml#
25 nuvoton,jkdet-enable:
26 description: Enable jack detection via JKDET pin.
29 nuvoton,jkdet-pull-enable:
30 description: Enable JKDET pin pull. If set - pin pull enabled,
34 nuvoton,jkdet-pull-up:
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| /Documentation/devicetree/bindings/regulator/ |
| D | ti,tps62360.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laxman Dewangan <ldewangan@nvidia.com>
13 The TPS6236x are a family of step down dc-dc converter with
14 an input voltage range of 2.5V to 5.5V. The devices provide
22 - $ref: regulator.yaml#
27 - ti,tps62360
28 - ti,tps62361
29 - ti,tps62362
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| /Documentation/devicetree/bindings/iio/frequency/ |
| D | adi,admv1014.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Antoniu Miclaus <antoniu.miclaus@analog.com>
21 - adi,admv1014
26 spi-max-frequency:
32 clock-names:
34 - const: lo_in
36 External clock that provides the Local Oscillator input.
38 vcm-supply:
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| /Documentation/devicetree/bindings/rtc/ |
| D | rtc-omap.txt | 4 - compatible:
5 - "ti,da830-rtc" - for RTC IP used similar to that on DA8xx SoC family.
6 - "ti,am3352-rtc" - for RTC IP used similar to that on AM335x SoC family.
7 This RTC IP has special WAKE-EN Register to enable
11 - "ti,am4372-rtc" - for RTC IP used similar to that on AM437X SoC family.
12 - reg: Address range of rtc register set
13 - interrupts: rtc timer, alarm interrupts in order
16 - system-power-controller: whether the rtc is controlling the system power
18 - clocks: Any internal or external clocks feeding in to rtc
19 - clock-names: Corresponding names of the clocks
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| /Documentation/devicetree/bindings/input/ |
| D | ti,drv260x.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/input/ti,drv260x.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Texas Instruments - drv260x Haptics driver family
10 - Andrew Davis <afd@ti.com>
15 - ti,drv2604
16 - ti,drv2605
17 - ti,drv2605l
22 vbat-supply:
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| /Documentation/devicetree/bindings/clock/ |
| D | clk-palmas-clk32kg-clocks.txt | 5 This binding uses the common clock binding ./clock-bindings.txt.
8 - compatible : "ti,palmas-clk32kg" for clk32kg clock
9 "ti,palmas-clk32kgaudio" for clk32kgaudio clock
10 - #clock-cells : shall be set to 0.
13 - ti,external-sleep-control: The external enable input pins controlled the
14 enable/disable of clocks. The external enable input pins ENABLE1,
22 dt-bindings/mfd/palmas.h
25 #include <dt-bindings/mfd/palmas.h>
30 compatible = "ti,palmas-clk32kg";
31 #clock-cells = <0>;
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| D | vt8500.txt | 1 Device Tree Clock bindings for arch-vt8500
5 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
8 - compatible : shall be one of the following:
9 "via,vt8500-pll-clock" - for a VT8500/WM8505 PLL clock
10 "wm,wm8650-pll-clock" - for a WM8650 PLL clock
11 "wm,wm8750-pll-clock" - for a WM8750 PLL clock
12 "wm,wm8850-pll-clock" - for a WM8850 PLL clock
13 "via,vt8500-device-clock" - for a VT/WM device clock
16 - reg : shall be the control register offset from PMC base for the pll clock.
17 - clocks : shall be the input parent clock phandle for the clock. This should
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| /Documentation/driver-api/mei/ |
| D | mei.rst | 1 .. SPDX-License-Identifier: GPL-2.0
7 resource (Co-processor) residing inside certain Intel chipsets. The Intel ME
18 each client has its own protocol. The protocol is message-based with a
50 .. code-block:: C
83 -------------------------
86 .. code-block:: none
96 struct mei_connect_client_data - contain the following
97 Input field:
99 in_client_uuid - GUID of the FW Feature that needs
102 out_client_properties - Client Properties: MTU and Protocol Version.
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