Searched +full:irq +full:- +full:can +full:- +full:wake (Results 1 – 25 of 47) sorted by relevance
12
| /Documentation/devicetree/bindings/input/ |
| D | gpio-keys.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/input/gpio-keys.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
15 - gpio-keys
16 - gpio-keys-polled
23 poll-interval: true
26 …"^(button|event|key|switch|(button|event|key|switch)-[a-z0-9-]+|[a-z0-9-]+-(button|event|key|switc…
35 - items:
[all …]
|
| D | atmel,maxtouch.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Nick Dyer <nick@shmanahar.org>
11 - Linus Walleij <linus.walleij@linaro.org>
18 - $ref: input.yaml#
30 vdda-supply:
34 vdd-supply:
38 reset-gpios:
45 wake-gpios:
[all …]
|
| /Documentation/devicetree/bindings/net/ |
| D | btusb.txt | 2 ---------------------------------------------------
6 - compatible : should comply with the format "usbVID,PID" specified in
7 Documentation/devicetree/bindings/usb/usb-device.yaml
13 "usb4ca,301a" (Qualcomm QCA6174A (Lite-On))
17 Documentation/devicetree/bindings/net/marvell-bt-8xxx.txt
21 - interrupt-names: (see below)
22 - interrupts : The interrupt specified by the name "wakeup" is the interrupt
23 that shall be used for out-of-band wake-on-bt. Driver will
25 irq will be enabled so that the bluetooth chip can wakeup host
26 platform out of band. During system resume, the irq will be
[all …]
|
| D | smsc,lan9115.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Smart Mixed-Signal Connectivity (SMSC) LAN911x/912x Controller
10 - Shawn Guo <shawnguo@kernel.org>
13 - $ref: ethernet-controller.yaml#
18 - const: smsc,lan9115
19 - items:
20 - enum:
21 - smsc,lan89218
[all …]
|
| /Documentation/power/ |
| D | suspend-and-interrupts.rst | 10 -----------------------------------
14 ->prepare, ->suspend and ->suspend_late callbacks have been executed for all
29 Device IRQs are re-enabled during system resume, right before the "early" phase
30 of resuming devices (that is, before starting to execute ->resume_early
35 ------------------------
37 There are interrupts that can legitimately trigger during the entire system
38 suspend-resume cycle, including the "noirq" phases of suspending and resuming
41 but also to IPIs and to some other special-purpose interrupts.
43 The IRQF_NO_SUSPEND flag is used to indicate that to the IRQ subsystem when
44 requesting a special-purpose interrupt. It causes suspend_device_irqs() to
[all …]
|
| D | charger-manager.rst | 7 Charger Manager provides in-kernel battery charger management that
8 requires temperature monitoring during suspend-to-RAM state
12 Charger Manager is a platform_driver with power-supply-class entries.
13 An instance of Charger Manager (a platform-device created with Charger-Manager)
26 own power-supply-class and each power-supply-class can provide
28 aggregates charger-related information from multiple sources and
29 shows combined information as a single power-supply-class.
31 * Support for in suspend-to-RAM polling (with suspend_again callback)
32 While the battery is being charged and the system is in suspend-to-RAM,
34 battery temperature. We can accomplish this by waking up the system
[all …]
|
| /Documentation/devicetree/bindings/rtc/ |
| D | isil,isl12057.txt | 8 ("wakeup-source") to handle the specific use-case found
9 on at least three in-tree users of the chip (NETGEAR ReadyNAS 102, 104
10 and 2120 ARM-based NAS); On those devices, the IRQ#2 pin of the chip
14 get access to the 'wakealarm' sysfs entry, this specific property can
15 be set when the IRQ#2 pin of the chip is not connected to the SoC but
16 can wake up the device.
20 - "compatible": must be "isil,isl12057"
21 - "reg": I2C bus address of the device
25 - "wakeup-source": mark the chip as a wakeup source, independently of
26 the availability of an IRQ line connected to the SoC.
[all …]
|
| /Documentation/devicetree/bindings/iio/accel/ |
| D | lis302.txt | 8 - compatible: should be set to "st,lis3lv02d-spi"
9 - reg: the chipselect index
10 - spi-max-frequency: maximal bus speed, should be set to 1000000 unless
12 - interrupts: the interrupt generated by the device
15 - compatible: should be set to "st,lis3lv02d"
16 - reg: i2c slave address
17 - Vdd-supply: The input supply for Vdd
18 - Vdd_IO-supply: The input supply for Vdd_IO
23 - st,click-single-{x,y,z}: if present, tells the device to issue an
26 - st,click-double-{x,y,z}: if present, tells the device to issue an
[all …]
|
| /Documentation/devicetree/bindings/net/wireless/ |
| D | brcm,bcm4329-fmac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/wireless/brcm,bcm4329-fmac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Arend van Spriel <arend@broadcom.com>
19 - $ref: ieee80211.yaml#
24 - items:
25 - enum:
26 - brcm,bcm43143-fmac
27 - brcm,bcm4341b0-fmac
[all …]
|
| D | silabs,wfx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Jérôme Pouiller <jerome.pouiller@silabs.com>
16 https://www.silabs.com/documents/public/data-sheets/wf200-datasheet.pdf
18 The WF200 can be connected via SPI or via SDIO.
25 It is recommended to declare a mmc-pwrseq on SDIO host above WFx. Without
26 it, you may encounter issues during reboot. The mmc-pwrseq should be
27 compatible with mmc-pwrseq-simple. Please consult
28 Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.yaml for more
[all …]
|
| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | brcm,bcm7038-l1-intc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/brcm,bcm7038-l1-intc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Broadcom BCM7038-style Level 1 interrupt controller
11 directly to one of the HW INT lines on each CPU. Every BCM7xxx set-top chip
16 - 64, 96, 128, or 160 incoming level IRQ lines
18 - Most onchip peripherals are wired directly to an L1 input
20 - A separate instance of the register set for each CPU, allowing individual
23 - Atomic mask/unmask operations
[all …]
|
| D | brcm,l2-intc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/brcm,l2-intc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Florian Fainelli <f.fainelli@gmail.com>
13 - $ref: /schemas/interrupt-controller.yaml#
18 - items:
19 - enum:
20 - brcm,hif-spi-l2-intc
21 - brcm,upg-aux-aon-l2-intc
[all …]
|
| D | qcom,pdc.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/qcom,pdc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
14 Power Domain Controller (PDC) that is on always-on domain. In addition to
16 interrupt controller that can be used to help detect edge low interrupts as
17 well detect interrupts when the GIC is non-operational.
28 - enum:
29 - qcom,qdu1000-pdc
[all …]
|
| D | img,pdc-intc.txt | 4 representation of a PDC IRQ controller. This has a number of input interrupt
5 lines which can wake the system, and are passed on through output interrupt
10 - compatible: Specifies the compatibility list for the interrupt controller.
11 The type shall be <string> and the value shall include "img,pdc-intc".
13 - reg: Specifies the base PDC physical address(s) and size(s) of the
14 addressable register space. The type shall be <prop-encoded-array>.
16 - interrupt-controller: The presence of this property identifies the node
19 - #interrupt-cells: Specifies the number of cells needed to encode an
22 - num-perips: Number of waking peripherals.
24 - num-syswakes: Number of SysWake inputs.
[all …]
|
| /Documentation/devicetree/bindings/pinctrl/ |
| D | qcom,tlmm-common.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,tlmm-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
19 TLMM summary IRQ and dirconn interrupts.
23 interrupt-controller: true
25 '#interrupt-cells':
28 include/dt-bindings/interrupt-controller/irq.h
31 gpio-controller: true
[all …]
|
| /Documentation/devicetree/bindings/sound/ |
| D | da7218.txt | 8 - compatible : Should be "dlg,da7217" or "dlg,da7218"
9 - reg: Specifies the I2C slave address
11 - VDD-supply: VDD power supply for the device
12 - VDDMIC-supply: VDDMIC power supply for the device
13 - VDDIO-supply: VDDIO power supply for the device
18 - interrupts: IRQ line info for DA7218 chip.
19 (See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt for
21 - interrupt-names : Name associated with interrupt line. Should be "wakeup" if
22 interrupt is to be used to wake system, otherwise "irq" should be used.
23 - wakeup-source: Flag to indicate this device can wake system (suspend/resume).
[all …]
|
| D | dialog,da7219.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - David Rau <David.Rau.opensource@dm.renesas.com>
13 The DA7219 is an ultra low-power audio codec with
14 in-built advanced accessory detection (AAD) for mobile
16 sample rates up to 96 kHz at 24-bit resolution.
28 VDD-supply:
32 VDDMIC-supply:
36 VDDIO-supply:
[all …]
|
| /Documentation/driver-api/gpio/ |
| D | intro.rst | 17 A "General Purpose Input/Output" (GPIO) is a flexible software-controlled
22 which GPIOs. Drivers can be written generically, so that board setup code
25 System-on-Chip (SOC) processors heavily rely on GPIOs. In some cases, every
26 non-dedicated pin can be configured as a GPIO; and most chips have at least
27 several dozen of them. Programmable logic devices (like FPGAs) can easily
31 Most PC southbridges have a few dozen GPIO-capable pins (with only the BIOS
36 - Output values are writable (high=1, low=0). Some chips also have
38 value might be driven, supporting "wire-OR" and similar schemes for the
41 - Input values are likewise readable (1, 0). Some chips support readback
42 of pins configured as "output", which is very useful in such "wire-OR"
[all …]
|
| /Documentation/accel/qaic/ |
| D | qaic.rst | 1 .. SPDX-License-Identifier: GPL-2.0-only
13 IRQ Storm Mitigation
14 --------------------
16 While the AIC100 DMA Bridge hardware implements an IRQ storm mitigation
17 mechanism, it is still possible for an IRQ storm to occur. A storm can happen
19 can drain the response FIFO as quickly as the device can insert elements into
21 non-empty and generate MSIs at a rate equivalent to the speed of the
23 workload is known to trigger this condition, and can generate in excess of 100k
28 To mitigate this issue, the QAIC driver implements specific IRQ handling. When
29 QAIC receives an IRQ, it disables that line. This prevents the interrupt
[all …]
|
| /Documentation/trace/ |
| D | timerlat-tracer.rst | 6 find sources of wakeup latencies of real-time threads. Like cyclictest,
13 -----
28 # _-----=> irqs-off
29 # / _----=> need-resched
30 # | / _---=> hardirq/softirq
31 # || / _--=> preempt-depth
34 # TASK-PID CPU# |||| TIMESTAMP ID CONTEXT LATENCY
36 <idle>-0 [000] d.h1 54.029328: #1 context irq timer_latency 932 ns
37 <...>-867 [000] .... 54.029339: #1 context thread timer_latency 11700 ns
38 <idle>-0 [001] dNh1 54.029346: #1 context irq timer_latency 2833 ns
[all …]
|
| /Documentation/scheduler/ |
| D | sched-energy.rst | 6 ---------------
25 please refer to its documentation (see Documentation/power/energy-model.rst).
29 -----------------------------
32 - energy = [joule] (resource like a battery on powered devices)
33 - power = energy/time = [joule/second] = [watt]
39 --------------------
45 -----------
49 optimization objective to the current performance-only objective for the
50 scheduler. This alternative considers two objectives: energy-efficiency and
54 implications of its decisions rather than blindly applying energy-saving
[all …]
|
| /Documentation/admin-guide/ |
| D | rtc.rst | 8 the local time zone or daylight savings time -- unless they dual boot
9 with MS-Windows -- but will instead be set to Coordinated Universal Time
12 The newest non-PC hardware tends to just count seconds, like the time(2)
16 Linux has two largely-compatible userspace RTC API families you may
20 so it's not very portable to non-x86 systems.
26 always available, and some systems can do much more. That is, the
30 IRQ, so they can't all issue alarms; and where standard PC RTCs can
35 Old PC/AT-Compatible driver: /dev/rtc
36 --------------------------------------
44 a few ways (enabling longer alarm periods, and wake-from-hibernate).
[all …]
|
| /Documentation/networking/device_drivers/ethernet/3com/ |
| D | vortex.rst | 1 .. SPDX-License-Identifier: GPL-2.0
20 - Andrew Morton
21 - Netdev mailing list <netdev@vger.kernel.org>
22 - Linux kernel mailing list <linux-kernel@vger.kernel.org>
28 Since kernel 2.3.99-pre6, this driver incorporates the support for the
29 3c575-series Cardbus cards which used to be handled by 3c575_cb.c.
33 - 3c590 Vortex 10Mbps
34 - 3c592 EISA 10Mbps Demon/Vortex
35 - 3c597 EISA Fast Demon/Vortex
36 - 3c595 Vortex 100baseTx
[all …]
|
| /Documentation/devicetree/bindings/cpu/ |
| D | idle-states.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/cpu/idle-states.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
11 - Anup Patel <anup@brainfault.org>
15 1 - Introduction
18 ARM and RISC-V systems contain HW capable of managing power consumption
19 dynamically, where cores can be put in different low-power states (ranging
21 representing the range of dynamic idle states that a processor can enter at
[all …]
|
| /Documentation/devicetree/bindings/mmc/ |
| D | mmc-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ulf Hansson <ulf.hansson@linaro.org>
25 "#address-cells":
30 "#size-cells":
37 broken-cd:
42 cd-gpios:
47 non-removable:
[all …]
|
12