Searched +full:isa +full:- +full:extensions (Results 1 – 15 of 15) sorted by relevance
| /Documentation/arch/riscv/ |
| D | uabi.rst | 1 .. SPDX-License-Identifier: GPL-2.0
3 RISC-V Linux User ABI
6 ISA string ordering in /proc/cpuinfo
7 ------------------------------------
9 The canonical order of ISA extension names in the ISA string is defined in
14 #. Single-letter extensions come first, in canonical order.
17 #. All multi-letter extensions will be separated from other extensions by an
20 #. Additional standard extensions (starting with 'Z') will be sorted after
21 single-letter extensions and before any higher-privileged extensions.
23 #. For additional standard extensions, the first letter following the 'Z'
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| D | hwprobe.rst | 1 .. SPDX-License-Identifier: GPL-2.0
3 RISC-V Hardware Probing Interface
4 ---------------------------------
6 The RISC-V hardware probing interface is based around a single syscall, which
18 The arguments are split into three groups: an array of key-value pairs, a CPU
19 set, and some flags. The key-value pairs are supplied with a count. Userspace
22 will be cleared to -1, and its value set to 0. The CPU set is defined by
23 CPU_SET(3) with size ``cpusetsize`` bytes. For value-like keys (eg. vendor,
25 have the same value. Otherwise -1 will be returned. For boolean-like keys, the
33 by sys_riscv_hwprobe() to only those which match each of the key-value pairs.
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| /Documentation/devicetree/bindings/riscv/ |
| D | extensions.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 ---
4 $id: http://devicetree.org/schemas/riscv/extensions.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: RISC-V ISA extensions
10 - Paul Walmsley <paul.walmsley@sifive.com>
11 - Palmer Dabbelt <palmer@sifive.com>
12 - Conor Dooley <conor@kernel.org>
15 RISC-V has a large number of extensions, some of which are "standard"
16 extensions, meaning they are ratified by RISC-V International, and others
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| D | cpus.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: RISC-V CPUs
10 - Paul Walmsley <paul.walmsley@sifive.com>
11 - Palmer Dabbelt <palmer@sifive.com>
12 - Conor Dooley <conor@kernel.org>
15 This document uses some terminology common to the RISC-V community
19 mandated by the RISC-V ISA: a PC and some registers. This
27 - $ref: /schemas/cpu.yaml#
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| /Documentation/userspace-api/media/v4l/ |
| D | vidioc-querycap.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
13 VIDIOC_QUERYCAP - Query device capabilities
47 .. flat-table:: struct v4l2_capability
48 :header-rows: 0
49 :stub-columns: 0
52 * - __u8
53 - ``driver``\ [16]
54 - Name of the driver, a unique NUL-terminated ASCII string. For
62 sure the strings are properly NUL-terminated.
63 * - __u8
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| /Documentation/networking/ |
| D | filter.rst | 1 .. SPDX-License-Identifier: GPL-2.0
3 .. _networking-filter:
10 ------
17 ------------
24 BPF allows a user-space program to attach a filter onto any socket and
49 The biggest user of this construct might be libpcap. Issuing a high-level
50 filter command like `tcpdump -i em1 port 22` passes through the libpcap
52 via SO_ATTACH_FILTER to the kernel. `tcpdump -i em1 port 22 -ddd`
57 qdisc layer, SECCOMP-BPF (SECure COMPuting [1]_), and lots of other places
60 .. [1] Documentation/userspace-api/seccomp_filter.rst
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| /Documentation/arch/loongarch/ |
| D | introduction.rst | 1 .. SPDX-License-Identifier: GPL-2.0
7 LoongArch is a new RISC ISA, which is a bit like MIPS or RISC-V. There are
8 currently 3 variants: a reduced 32-bit version (LA32R), a standard 32-bit
9 version (LA32S) and a 64-bit version (LA64). There are 4 privilege levels
22 ----
24 LoongArch has 32 GPRs ( ``$r0`` ~ ``$r31`` ); each one is 32-bit wide in LA32
25 and 64-bit wide in LA64. ``$r0`` is hard-wired to zero, and the other registers
26 are not architecturally special. (Except ``$r1``, which is hard-wired as the
30 the LoongArch ELF psABI spec, in :ref:`References <loongarch-references>`:
40 ``$r4``-``$r11`` ``$a0``-``$a7`` Argument registers No
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| /Documentation/bpf/ |
| D | bpf_design_QA.rst | 19 -------------------------------------------------------------
23 -------------------------------------
27 -----------------------------------------------------------
45 A: NO. BPF calling convention only allows registers R1-R5 to be used
47 (unlike x64 ISA that allows msft, cdecl and other conventions)
50 -----------------------------------------------------------------
54 ------------------------------------------
62 Q: Does C-calling convention diminishes possible use cases?
63 -----------------------------------------------------------
74 Q: Does it mean that 'innovative' extensions to BPF code are disallowed?
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| /Documentation/kernel-hacking/ |
| D | hacking.rst | 20 this document, being grossly under-qualified, but I always wanted to
30 - not associated with any process, serving a hardware interrupt;
32 - not associated with any process, serving a softirq or tasklet;
34 - running in kernel space, associated with a process (user context);
36 - running a process in user space.
45 to become truly non-preemptable.
48 ------------
69 -------------------------------
74 handler is never re-entered: if the same interrupt arrives, it is queued
88 -------------------------------------------------
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| /Documentation/input/joydev/ |
| D | joystick.rst | 3 .. _joystick-doc:
14 linux-input@vger.kernel.org
16 send "subscribe linux-input" to majordomo@vger.kernel.org to subscribe to it.
25 ---------
29 usually packaged as ``joystick``, ``input-utils``, ``evtest``, and so on.
35 ------------
48 ln -s input/js0 js0
49 ln -s input/js1 js1
50 ln -s input/js2 js2
51 ln -s input/js3 js3
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| /Documentation/kbuild/ |
| D | makefiles.rst | 29 architecture-specific information to the top Makefile.
34 any built-in or modular targets.
80 ----------------
90 obj-y += foo.o
95 If foo.o shall be built as a module, the variable obj-m is used.
100 obj-$(CONFIG_FOO) += foo.o
102 $(CONFIG_FOO) evaluates to either y (for built-in) or m (for module).
106 Built-in object goals - obj-y
107 -----------------------------
110 in the $(obj-y) lists. These lists depend on the kernel
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| /Documentation/core-api/ |
| D | dma-api.rst | 8 of the API (and actual examples), see Documentation/core-api/dma-api-howto.rst.
11 Part II describes extensions for supporting non-consistent memory
13 non-consistent platforms (this is usually only legacy platforms) you
16 Part I - dma_API
17 ----------------
19 To get the dma_API, you must #include <linux/dma-mapping.h>. This
27 Part Ia - Using large DMA-coherent buffers
28 ------------------------------------------
76 Part Ib - Using small DMA-coherent buffers
77 ------------------------------------------
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| /Documentation/virt/kvm/ |
| D | api.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 The Definitive KVM (Kernel-based Virtual Machine) API Documentation
13 - System ioctls: These query and set global attributes which affect the
17 - VM ioctls: These query and set attributes that affect an entire virtual
24 - vcpu ioctls: These query and set attributes that control the operation
32 - device ioctls: These query and set attributes that control the operation
75 3. Extensions
80 facility that allows backward-compatible extensions to the API to be
104 the ioctl returns -ENOTTY.
122 -----------------------
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| /Documentation/translations/it_IT/kernel-hacking/ |
| D | hacking.rst | 1 .. include:: ../disclaimer-ita.rst
4 :ref:`Documentation/kernel-hacking/hacking.rst <kernel_hacking_hack>`
6 :Original: :ref:`Documentation/kernel-hacking/hacking.rst <kernel_hacking_hack>`
38 - non associata ad alcun processo, servendo un'interruzione hardware;
40 - non associata ad alcun processo, servendo un softirq o tasklet;
42 - in esecuzione nello spazio kernel, associata ad un processo
45 - in esecuzione di un processo nello spazio utente;
58 ---------------
81 ---------------------------------
102 ---------------------------------------------------
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| /Documentation/admin-guide/ |
| D | kernel-parameters.txt | 16 force -- enable ACPI if default was off
17 on -- enable ACPI but allow fallback to DT [arm64,riscv64]
18 off -- disable ACPI if default was on
19 noirq -- do not use ACPI for IRQ routing
20 strict -- Be less tolerant of platforms that are not
22 rsdt -- prefer RSDT over (default) XSDT
23 copy_dsdt -- copy DSDT to memory
24 nospcr -- disable console in ACPI SPCR table as
41 If set to vendor, prefer vendor-specific driver
73 Documentation/firmware-guide/acpi/debug.rst for more information about
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