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/Documentation/arch/powerpc/
Delf_hwcaps.rst148 supporting later architectures DO NOT set this feature.
161 supporting later architectures also set this feature.
183 supporting later architectures also set this feature.
196 later.
210 supporting later architectures also set this feature.
229 supporting later architectures also set this feature.
/Documentation/ABI/testing/
Dsysfs-devices-mmc6 eMMC4.4 or later card can support such feature. This kind of
17 eMMC4.4 or later card can support such feature. This kind of
/Documentation/networking/
Dsmc-sysctl.rst26 Controls which type of sndbufs and RMBs to use in later newly created
65 for SMC-R v2.1 and later.
71 acceptable value ranges from 16 to 255. Only for SMC-R v2.1 and later.
/Documentation/arch/arm64/
Dcpu-hotplug.rst10 CPUs that were not available during boot to be added to the system later.
63 that firmware wishes to disable either from boot (or later) should not be
65 bit set, to indicate they can be enabled later. The boot CPU must be marked as
78 re-discover the dynamic properties of the system from the _STA method later
/Documentation/i2c/busses/
Di2c-i801.rst56 On Intel Patsburg and later chipsets, both the normal host SMBus controller
86 ICH3 (82801CA/CAM) and later devices (PCH) are Intel chips that are a part of
110 Block process call is supported on the 82801EB (ICH5) and later chips.
116 I2C block read is supported on the 82801EB (ICH5) and later chips.
122 The 82801DB (ICH4) and later chips support several SMBus 2.0 features.
128 PCI interrupt support is supported on the 82801EB (ICH5) and later chips.
177 Note: There's a useful script in lm_sensors 2.10.2 and later, named
/Documentation/devicetree/bindings/misc/
Dnvidia,tegra186-misc.yaml7 title: NVIDIA Tegra186 (and later) MISC register block
13 description: The MISC register block found on Tegra186 and later SoCs contains
/Documentation/userspace-api/media/v4l/
Dapp-pri.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
15 applications and automatically regain control of the device at a later
Dselection-api-vs-crop-api.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
11 capture devices. Later the cropping API was adopted by video output
Ddepth-formats.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
/Documentation/devicetree/bindings/i2c/
Dnvidia,tegra186-bpmp-i2c.yaml7 title: NVIDIA Tegra186 (and later) BPMP I2C controller
14 In Tegra186 and later, the BPMP (Boot and Power Management Processor)
/Documentation/userspace-api/media/rc/
Dlirc-set-rec-carrier-range.rst1 .. SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-no-invariants-or-later
41 <LIRC_SET_REC_CARRIER_RANGE>` with the lower bound first and later call
Dlirc-dev.rst1 .. SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-no-invariants-or-later
Dlirc-header.rst1 .. SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-no-invariants-or-later
/Documentation/devicetree/bindings/interrupt-controller/
Dnvidia,tegra20-ictlr.txt14 Tegra generations later than Tegra30 the compatible value should
18 whereas Tegra30 and later have 5).
/Documentation/devicetree/bindings/sound/
Dnvidia,tegra30-ahub.txt21 Tegra30 and later:
33 Tegra114 and later additionally require:
36 Tegra124 and later additionally require:
/Documentation/userspace-api/media/
Dindex.rst48 any later version published by the Free Software Foundation, with no
60 later version.
/Documentation/userspace-api/media/dvb/
Dca-fopen.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
56 blocking mode can later be put into non-blocking mode (and vice versa)
Dfrontend-header.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
Dca_data_types.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
Dnet-types.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
Ddmx_types.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
Ddvb-frontend-event.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
/Documentation/driver-api/surface_aggregator/
Doverview.rst20 Book 2, Surface Laptop 1) and later generation devices, SAM is responsible
51 5th and later generations, communication takes place via a USART serial
67 communication interface for SAM on 5th- and all later-generation Surface
/Documentation/userspace-api/media/cec/
Dcec-header.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
/Documentation/admin-guide/
Dabi-obsolete.rst5 marked to be removed at some later point in time.

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