Home
last modified time | relevance | path

Searched +full:little +full:- +full:endian (Results 1 – 25 of 144) sorted by relevance

123456

/Documentation/devicetree/bindings/regmap/
Dregmap.txt5 little-endian,
6 big-endian,
7 native-endian: See common-properties.txt for a definition
10 Regmap defaults to little-endian register access on MMIO based
12 architectures that typically run big-endian operating systems
13 (e.g. PowerPC), registers can be defined as big-endian and must
16 On SoCs that can be operated in both big-endian and little-endian
19 chips), "native-endian" is used to allow using the same device tree
23 Scenario 1 : a register set in big-endian mode.
27 big-endian;
/Documentation/devicetree/bindings/
Dcommon-properties.txt5 ----------
13 - big-endian: Boolean; force big endian register accesses
15 know the peripheral always needs to be accessed in big endian (BE) mode.
16 - little-endian: Boolean; force little endian register accesses
18 peripheral always needs to be accessed in little endian (LE) mode.
19 - native-endian: Boolean; always use register accesses matched to the
20 endianness of the kernel binary (e.g. LE vmlinux -> readl/writel,
21 BE vmlinux -> ioread32be/iowrite32be). In this case no byte swaps
22 will ever be performed. Use this if the hardware "self-adjusts"
27 In such cases, little-endian is the preferred default, but it is not
[all …]
/Documentation/devicetree/bindings/i2c/
Di2c-mux-reg.txt1 Register-based I2C Bus Mux
7 - compatible: i2c-mux-reg
8 - i2c-parent: The phandle of the I2C bus that this multiplexer's master-side
10 * Standard I2C mux properties. See i2c-mux.yaml in this directory.
11 * I2C child bus nodes. See i2c-mux.yaml in this directory.
14 - reg: this pair of <offset size> specifies the register to control the mux.
15 The <offset size> depends on its parent node. It can be any memory-mapped
18 - little-endian: The existence indicates the register is in little endian.
19 - big-endian: The existence indicates the register is in big endian.
20 If both little-endian and big-endian are omitted, the endianness of the
[all …]
/Documentation/translations/zh_CN/arch/riscv/
Dboot-image-header.rst1 .. include:: ../../disclaimer-zh_CN.rst
3 :Original: Documentation/arch/riscv/boot-image-header.rst
9 .. _cn_boot-image-header.rst:
12 RISC-V Linux启动镜像文件头
18 此文档仅描述RISC-V Linux 启动文件头的详情。
27 u64 text_offset; /* Image load offset, little endian */
28 u64 image_size; /* Effective Image size, little endian */
29 u64 flags; /* kernel flags, little endian */
33 u64 magic = 0x5643534952; /* Magic number, little endian, "RISCV" */
34 u32 magic2 = 0x05435352; /* Magic number 2, little endian, "RSC\x05" */
[all …]
/Documentation/devicetree/bindings/display/
Dsm501fb.txt7 - compatible : should be "smi,sm501".
8 - reg : contain two entries:
9 - First entry: System Configuration register
10 - Second entry: IO space (Display Controller register)
11 - interrupts : SMI interrupt to the cpu should be described here.
14 - mode : select a video mode:
15 <xres>x<yres>[-<bpp>][@<refresh>]
16 - edid : verbatim EDID data block describing attached display.
19 - little-endian: available on big endian systems, to
20 set different foreign endian.
[all …]
/Documentation/arch/riscv/
Dboot-image-header.rst2 Boot image header in RISC-V Linux
8 This document only describes the boot image header details for RISC-V Linux.
10 The following 64-byte header is present in decompressed Linux kernel image::
14 u64 text_offset; /* Image load offset, little endian */
15 u64 image_size; /* Effective Image size, little endian */
16 u64 flags; /* kernel flags, little endian */
20 u64 magic = 0x5643534952; /* Magic number, little endian, "RISCV" */
21 u32 magic2 = 0x05435352; /* Magic number 2, little endian, "RSC\x05" */
25 ARM64 header. Thus, both ARM64 & RISC-V header can be combined into one common
31 - This header is also reused to support EFI stub for RISC-V. EFI specification
[all …]
/Documentation/devicetree/bindings/gpio/
Dfsl,qoriq-gpio.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/fsl,qoriq-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Li <Frank.Li@nxp.com>
15 - enum:
16 - fsl,mpc5121-gpio
17 - fsl,mpc5125-gpio
18 - fsl,mpc8349-gpio
19 - fsl,mpc8572-gpio
[all …]
/Documentation/devicetree/bindings/soc/fsl/
Dguts.txt4 enabling, power-on-reset configuration monitoring, general-purpose
10 - compatible : Should define the compatible device type for
11 global-utilities.
13 "fsl,qoriq-device-config-1.0"
14 "fsl,qoriq-device-config-2.0"
15 "fsl,<chip>-device-config"
16 "fsl,<chip>-guts"
17 - reg : Offset and length of the register set for the device.
21 - fsl,has-rstcr : Indicates that the global utilities register set
25 - fsl,liodn-bits : Indicates the number of defined bits in the LIODN
[all …]
Dfsl,ls1028a-reset.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas//soc/fsl/fsl,ls1028a-reset.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Li <Frank.Li@nxp.com>
18 pattern: "^syscon@[0-9a-f]+$"
22 - enum:
23 - fsl,ls1028a-reset
24 - const: syscon
25 - const: simple-mfd
[all …]
Dfsl,rcpm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The RCPM performs all device-level tasks associated with device run control
14 - Frank Li <Frank.Li@nxp.com>
19 - items:
20 - enum:
21 - fsl,p2041-rcpm
22 - fsl,p3041-rcpm
23 - fsl,p4080-rcpm
[all …]
/Documentation/devicetree/bindings/hwinfo/
Dloongson,ls2k-chipid.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/hwinfo/loongson,ls2k-chipid.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson-2 SoC ChipID
10 - Yinbo Zhu <zhuyinbo@loongson.cn>
13 Loongson-2 SoC contains many groups of global utilities register
19 const: loongson,ls2k-chipid
24 little-endian: true
27 - compatible
[all …]
/Documentation/userspace-api/media/v4l/
Dpixfmt-sdr-ru12le.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _V4L2-SDR-FMT-RU12LE:
10 Real unsigned 12-bit little endian sample
17 represented as a 12 bit unsigned little endian number. Sample is stored
26 .. flat-table::
27 :header-rows: 0
28 :stub-columns: 0
30 * - start + 0:
31 - I'\ :sub:`0[7:0]`
32 - I'\ :sub:`0[11:8]`
Dpixfmt-sdr-cu16le.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _V4L2-SDR-FMT-CU16LE:
10 Complex unsigned 16-bit little endian IQ sample
17 number consist two parts, called In-phase and Quadrature (IQ). Both I
18 and Q are represented as a 16 bit unsigned little endian number. I value
25 .. flat-table::
26 :header-rows: 0
27 :stub-columns: 0
29 * - start + 0:
30 - I'\ :sub:`0[7:0]`
[all …]
Dpixfmt-sdr-cs14le.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _V4L2-SDR-FMT-CS14LE:
9 Complex signed 14-bit little endian IQ sample
16 number consist two parts, called In-phase and Quadrature (IQ). Both I
17 and Q are represented as a 14 bit signed little endian number. I value
25 .. flat-table::
26 :header-rows: 0
27 :stub-columns: 0
29 * - start + 0:
30 - I'\ :sub:`0[7:0]`
[all …]
Dpixfmt-y12i.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _V4L2-PIX-FMT-Y12I:
9 Interleaved grey-scale image, e.g. from a stereo-pair
15 This is a grey-scale image with a depth of 12 bits per pixel, but with
16 pixels from 2 sources interleaved and bit-packed. Each pixel is stored
17 in a 24-bit word in the little-endian order. On a little-endian machine
20 .. code-block:: c
26 **Bit-packed representation.**
30 .. flat-table::
31 :header-rows: 0
[all …]
/Documentation/filesystems/
Dsysv-fs.rst1 .. SPDX-License-Identifier: GPL-2.0
8 - Xenix FS,
9 - SystemV/386 FS,
10 - Coherent FS.
18 mount [-r] -t sysv device mountpoint
22 -t sysv
23 -t xenix
24 -t coherent
30 - Coherent FS:
32 - The "free list interleave" n:m is currently ignored.
[all …]
/Documentation/devicetree/bindings/mmc/
Dfsl,esdhc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - Frank Li <Frank.Li@nxp.com>
19 - enum:
20 - fsl,mpc8536-esdhc
21 - fsl,mpc8378-esdhc
22 - fsl,p2020-esdhc
23 - fsl,p4080-esdhc
24 - fsl,t1040-esdhc
[all …]
/Documentation/devicetree/bindings/memory-controllers/fsl/
Dfsl,ddr.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/fsl/fsl,ddr.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Borislav Petkov <bp@alien8.de>
11 - York Sun <york.sun@nxp.com>
15 pattern: "^memory-controller@[0-9a-f]+$"
19 - items:
20 - enum:
21 - fsl,qoriq-memory-controller-v4.4
[all …]
Dfsl,ifc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/fsl/fsl,ifc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
21 pattern: "^memory-controller@[0-9a-f]+$"
26 "#address-cells":
32 "#size-cells":
49 little-endian:
52 If this property is absent, the big-endian mode will be in use as default
[all …]
/Documentation/ABI/testing/
Ddebugfs-scmi-raw7 in little-endian binary format to have it sent to the configured
22 in little-endian binary format to have it sent to the configured
38 Description: SCMI Raw message errors facility; any kind of timed-out or
65 different test-run.
74 in little-endian binary format to have it sent to the configured
87 Note that these per-channel entries rooted at <..>/channels
98 in little-endian binary format to have it sent to the configured
114 Note that these per-channel entries rooted at <..>/channels
/Documentation/devicetree/bindings/phy/
Dlantiq,vrx200-pcie-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/lantiq,vrx200-pcie-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Martin Blumenstingl <martin.blumenstingl@googlemail.com>
13 "#phy-cells":
15 description: selects the PHY mode as defined in <dt-bindings/phy/phy-lantiq-vrx200-pcie.h>
19 - lantiq,vrx200-pcie-phy
20 - lantiq,arx300-pcie-phy
27 - description: PHY module clock
[all …]
/Documentation/devicetree/bindings/net/
Dfsl,fman-mdio.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/fsl,fman-mdio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Li <Frank.Li@nxp.com>
18 - fsl,fman-mdio
19 - fsl,fman-xmdio
20 - fsl,fman-memac-mdio
22 Must include "fsl,fman-mdio" for 1 Gb/s MDIO from FMan v2.
23 Must include "fsl,fman-xmdio" for 10 Gb/s MDIO from FMan v2.
[all …]
/Documentation/devicetree/bindings/thermal/
Dqoriq-thermal.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/thermal/qoriq-thermal.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
11 - Sascha Hauer <s.hauer@pengutronix.de>
12 - Fabio Estevam <festevam@gmail.com>
14 $ref: thermal-sensor.yaml#
23 ---------- -----
26 - fsl,qoriq-tmu
[all …]
/Documentation/devicetree/bindings/rtc/
Dfsl,ls-ftm-alarm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/rtc/fsl,ls-ftm-alarm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Li <Frank.Li@nxp.com>
15 - fsl,ls1012a-ftm-alarm
16 - fsl,ls1021a-ftm-alarm
17 - fsl,ls1028a-ftm-alarm
18 - fsl,ls1043a-ftm-alarm
19 - fsl,ls1046a-ftm-alarm
[all …]
/Documentation/devicetree/bindings/pwm/
Dfsl,vf610-ftm-pwm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pwm/fsl,vf610-ftm-pwm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 SoC | FTM-PWM endianness
16 --------+-------------------
21 Please see ../regmap/regmap.txt for more detail about how to specify endian
25 - Frank Li <Frank.Li@nxp.com>
30 - fsl,vf610-ftm-pwm
31 - fsl,imx8qm-ftm-pwm
[all …]

123456