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/Documentation/
Dmemory-barriers.txt59 - Read memory barriers vs load speculation.
158 STORE A=3, STORE B=4, y=LOAD A->3, x=LOAD B->4
159 STORE A=3, STORE B=4, x=LOAD B->4, y=LOAD A->3
160 STORE A=3, y=LOAD A->3, STORE B=4, x=LOAD B->4
161 STORE A=3, y=LOAD A->3, x=LOAD B->2, STORE B=4
162 STORE A=3, x=LOAD B->2, STORE B=4, y=LOAD A->3
163 STORE A=3, x=LOAD B->2, y=LOAD A->3, STORE B=4
164 STORE B=4, STORE A=3, y=LOAD A->3, x=LOAD B->4
197 Note that CPU 2 will never try and load C into D because the CPU will load P
198 into Q before issuing the load of *Q.
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/Documentation/devicetree/bindings/rtc/
Dnxp,pcf85063.yaml33 quartz-load-femtofarads:
35 The capacitive load of the quartz(x-tal).
57 quartz-load-femtofarads: false
66 quartz-load-femtofarads:
84 quartz-load-femtofarads = <12500>;
Dnxp,pcf8523.yaml22 quartz-load-femtofarads:
24 The capacitive load of the crystal, expressed in femto Farad (fF).
43 quartz-load-femtofarads = <7000>;
Dnxp,pcf85363.yaml33 quartz-load-femtofarads:
35 The capacitive load of the quartz(x-tal).
58 quartz-load-femtofarads = <12500>;
/Documentation/devicetree/bindings/gpio/
Dgpio-pisosr.txt15 - load-gpios : GPIO pin specifier attached to load enable, this
17 load input pin values into the device.
29 load-gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
/Documentation/arch/x86/
Dmds.rst14 - Microarchitectural Load Port Data Sampling (MLPDS) (CVE-2018-12127)
18 dependent load (store-to-load forwarding) as an optimization. The forward
19 can also happen to a faulting or assisting load operation for a different
27 to a memory or I/O operation. Fill buffers can forward data to a load
30 can then be forwarded to a faulting or assisting load operation, which can
34 MLPDS leaks Load Port Data. Load ports are used to perform load operations
36 file or a subsequent operation. In some implementations the Load Port can
39 exploited eventually. Load ports are shared between Hyper-Threads so cross
42 MDSUM is a special case of MSBDS, MFBDS and MLPDS. An uncacheable load from
54 - to control the load to trigger a fault or assist
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/Documentation/leds/
Dleds-mt6370-rgb.rst50 * Tr1: First rising time for 0% - 30% load.
51 * Tr2: Second rising time for 31% - 100% load.
52 * Ton: On time for 100% load.
53 * Tf1: First falling time for 100% - 31% load.
54 * Tf2: Second falling time for 30% to 0% load.
55 * Toff: Off time for 0% load.
Dleds-lp5521.rst31 disabled, load, run
33 store program (visible only in engine load mode)
38 echo "load" > engine3_mode
/Documentation/devicetree/bindings/media/i2c/
Dmax2175.txt22 - maxim,refout-load : load capacitance value (in picofarads) on reference
23 output drive level. The possible load values are:
51 maxim,refout-load = <10>;
/Documentation/i2c/
Di2c-stub.rst35 1. load this module
36 2. use i2cset (from the i2c-tools project) to pre-load some data
37 3. load the target chip driver module
41 can load register values automatically from a chip dump.
/Documentation/devicetree/bindings/regulator/
Drichtek,rtmv20-regulator.yaml13 Richtek RTMV20 is a load switch current regulator that can supply up to 6A.
38 load current pulse delay in microsecond after strobe pin pulse high.
45 Load current pulse width in microsecond after strobe pin pulse high.
85 description: Eye safety function load current limit in microamp.
121 description: load switch current regulator description.
/Documentation/admin-guide/media/
Dcafe_ccic.rst30 Load time options
33 There are a few load-time options, most of which can be changed after
38 then worst-case-sized buffers will be allocated at module load time.
43 option is only consulted for load-time allocation; when buffers are
/Documentation/translations/ko_KR/
Dmemory-barriers.txt188 STORE A=3, STORE B=4, y=LOAD A->3, x=LOAD B->4
189 STORE A=3, STORE B=4, x=LOAD B->4, y=LOAD A->3
190 STORE A=3, y=LOAD A->3, STORE B=4, x=LOAD B->4
191 STORE A=3, y=LOAD A->3, x=LOAD B->2, STORE B=4
192 STORE A=3, x=LOAD B->2, STORE B=4, y=LOAD A->3
193 STORE A=3, x=LOAD B->2, y=LOAD A->3, STORE B=4
194 STORE B=4, STORE A=3, y=LOAD A->3, x=LOAD B->4
245 STORE *A = 5, x = LOAD *D
246 x = LOAD *D, STORE *A = 5
263 Q = LOAD P, D = LOAD *Q
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/Documentation/networking/device_drivers/ethernet/dec/
Ddmfe.rst23 didn't compile this driver as a module, it will automatically load itself on boot and print a
28 If you compiled this driver as a module, you have to load it on boot.You can load it with command::
32 This way it will autodetect the device mode.This is the suggested way to load the module.Or you can…
/Documentation/arch/arm/sa1100/
Dassabet.rst91 load zImage -r -b 0x100000
95 load -m ymodem -r -b 0x100000
108 load ramdisk_image.gz -r -b 0x800000
115 fis load "Linux kernel"
138 To load this file::
140 load sample_img.jffs2 -r -b 0x100000
144 RedBoot> load sample_img.jffs2 -r -b 0x100000
202 fis load "Linux kernel"
228 >> load zImage -r -b 0x100000
229 >> load ramdisk_ks.gz -r -b 0x800000
/Documentation/admin-guide/cgroup-v1/
Dcpusets.rst183 - cpuset.sched_load_balance flag: if set, load balance within CPUs on that cpuset
199 children of that task, to a cpuset allows organizing the work load
294 the system load imposed by a batch scheduler monitoring this
392 The kernel scheduler (kernel/sched/core.c) automatically load balances
398 The algorithmic cost of load balancing and its impact on key shared
402 domains such that it only load balances within each sched domain.
405 domain and hence won't be load balanced.
409 two domains won't be load balanced to the other one.
413 the isolated CPUs will not participate in load balancing, and will not
416 This default load balancing across all CPUs is not well suited for
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/Documentation/translations/sp_SP/
Dmemory-barriers.txt173 organizar en 24 combinaciones diferentes (donde LOAD es cargar y STORE es
176 STORE A=3, STORE B=4, y=LOAD A->3, x=LOAD B->4
177 STORE A=3, STORE B=4, x=LOAD B->4, y=LOAD A->3
178 STORE A=3, y=LOAD A->3, STORE B=4, x=LOAD B->4
179 STORE A=3, y=LOAD A->3, x=LOAD B->2, STORE B=4
180 STORE A=3, x=LOAD B->2, STORE B=4, y=LOAD A->3
181 STORE A=3, x=LOAD B->2, y=LOAD A->3, STORE B=4
182 STORE B=4, STORE A=3, y=LOAD A->3, x=LOAD B->4
232 STORE *A = 5, x = LOAD *D
233 x = LOAD *D, STORE *A = 5
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/Documentation/scheduler/
Dsched-domains.rst16 explicitly set. A sched domain's span means "balance process load among these
30 is treated as one entity. The load of a group is defined as the sum of the
31 load of each of its member CPUs, and only when the load of a group becomes
36 rebalancing event for the current runqueue has arrived. The actual load
/Documentation/admin-guide/device-mapper/
Ddm-ima.rst91 1. Table load
97 1. Table load:
171 data from previous load of an active table are measured.
180 dm_version_str := As described in the 'Table load' section above.
181 device_metadata := As described in the 'Table load' section above.
219 dm_version_str := As described in the 'Table load' section above.
221 … The format is same as 'device_metadata' described in the 'Table load' section above.
223 … The format is same as 'device_metadata' described in the 'Table load' section above.
259 dm_version_str := As described in the 'Table load' section above.
260 …device_inactive_metadata := Device metadata that was captured during the load time inactive table …
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/Documentation/sound/cards/
Djoystick.rst24 the load time. It'd be safer to plug in the joystick device before
67 additional modules. Load the corresponding module to add the gameport
82 support, so you don't have to load ns558 module. Just load "joydev"
90 Instead, you need to load "ns558" module in addition to "joydev" and
/Documentation/admin-guide/pm/
Dcpufreq.rst280 [Note that some governors are modular and it may be necessary to load a
405 Per-Entity Load Tracking (PELT) metric for the root control group of the
406 given CPU as the CPU utilization estimate (see the *Per-entity load tracking*
444 This governor uses CPU load as a CPU frequency selection metric.
446 In order to estimate the current CPU load, it measures the time elapsed between
449 time to the total CPU time is taken as an estimate of the load.
451 If this governor is attached to a policy shared by multiple CPUs, the load is
452 estimated for all of them and the greatest result is taken as the load estimate
460 irregular. Also, it affects its own CPU load metric by running code that
464 It generally selects CPU frequencies proportional to the estimated load, so that
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/Documentation/sphinx/
Dload_config.py12 u"""Load an additional configuration file into *namespace*.
46 # If there is an extra conf.py file, load it
48 sys.stdout.write("load additional sphinx-config: %s\n" % config_file)
/Documentation/arch/riscv/
Dboot-image-header.rst14 u64 text_offset; /* Image load offset, little endian */
33 load it as an EFI application. In order to support EFI stub, code0 is replaced
58 - Image size is mandatory for boot loader to load kernel image. Booting will
/Documentation/devicetree/bindings/ufs/
Dufs-common.yaml80 Specifies max. load that can be drawn from VCC supply.
84 Specifies max. load that can be drawn from VCCQ supply.
88 Specifies max. load that can be drawn from VCCQ2 supply.
/Documentation/devicetree/bindings/clock/
Dti,cdce925.yaml47 xtal-load-pf:
50 Crystal load-capacitor value to fine-tune performance on a
94 xtal-load-pf = <5>;

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