Searched +full:low +full:- +full:speed (Results 1 – 25 of 195) sorted by relevance
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| /Documentation/hwmon/ |
| D | adm9240.rst | 10 Addresses scanned: I2C 0x2c - 0x2f 20 Addresses scanned: I2C 0x2c - 0x2f 24 http://pdfserv.maxim-ic.com/en/ds/DS1780.pdf 30 Addresses scanned: I2C 0x2c - 0x2f 37 - Frodo Looijaard <frodol@dds.nl>, 38 - Philip Edelbrock <phil@netroedge.com>, 39 - Michiel Rook <michiel@grendelproject.nl>, 40 - Grant Coady <gcoady.lk@gmail.com> with guidance 44 --------- 46 chip MSB 5-bit address. Each chip reports a unique manufacturer [all …]
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| D | dme1737.rst | 18 Addresses scanned: none, address read from Super-I/O config space 34 Addresses scanned: none, address read from Super-I/O config space 43 ----------------- 52 Include non-standard LPC addresses 0x162e and 0x164e 55 - VIA EPIA SN18000 59 ----------- 63 and SCH5127 Super-I/O chips. These chips feature monitoring of 3 temp sensors 64 temp[1-3] (2 remote diodes and 1 internal), 8 voltages in[0-7] (7 external and 65 1 internal) and up to 6 fan speeds fan[1-6]. Additionally, the chips implement 66 up to 5 PWM outputs pwm[1-3,5-6] for controlling fan speeds both manually and [all …]
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| D | vt1211.rst | 10 Addresses scanned: none, address read from Super-I/O config space 24 ----------------- 29 configuration for channels 1-5. 30 Legal values are in the range of 0-31. Bit 0 maps to 47 ----------- 49 The VIA VT1211 Super-I/O chip includes complete hardware monitoring 52 implements 5 universal input channels (UCH1-5) that can be individually 60 connected to the PWM outputs of the VT1211 :-(). 80 ------------------ 82 Voltages are sampled by an 8-bit ADC with a LSB of ~10mV. The supported input [all …]
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| D | w83792d.rst | 10 Addresses scanned: I2C 0x2c - 0x2f 19 ----------------- 35 ----------- 42 parameter; this will put it into a more well-behaved state first. 44 The driver implements three temperature sensors, seven fan rotation speed 48 The driver also implements up to seven fan control outputs: pwm1-7. Pwm1-7 53 Automatic fan control mode is possible only for fan1-fan3. 55 For all pwmX outputs, a value of 0 means minimum fan speed and a value of 56 255 means maximum fan speed. 64 triggered if the rotation speed has dropped below a programmable limit. Fan [all …]
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| D | adm1031.rst | 26 - Alexandre d'Alton <alex@alexdalton.org> 27 - Jean Delvare <jdelvare@suse.de> 30 ----------- 39 Each temperature channel has its own high and low limits, plus a critical 42 The ADM1030 monitors a single fan speed, while the ADM1031 monitors up to 43 two. Each fan channel has its own low speed limit.
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| D | pc87360.rst | 22 ----------------- 27 - 0: None 28 - **1**: Forcibly enable internal voltage and temperature channels, 30 - 2: Forcibly enable all voltage and temperature channels, except in9 31 - 3: Forcibly enable all voltage and temperature channels, including in9 42 ----------- 56 PC87360 - 2 2 - 0xE1 57 PC87363 - 2 2 - 0xE8 58 PC87364 - 3 3 - 0xE4 60 PC87366 11 3 3 3-4 0xE9 [all …]
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| D | adm1026.rst | 16 - Philip Pokorny <ppokorny@penguincomputing.com> for Penguin Computing 17 - Justin Thiessen <jthiessen@penguincomputing.com> 20 ----------------- 23 List of GPIO pins (0-16) to program as inputs 26 List of GPIO pins (0-16) to program as outputs 29 List of GPIO pins (0-16) to program as inverted 32 List of GPIO pins (0-16) to program as normal/non-inverted 35 List of GPIO pins (0-7) to program as fan tachs 39 ----------- 45 16 general purpose digital I/O lines, eight (8) fan speed sensors (8-bit), [all …]
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| D | adt7462.rst | 17 ----------- 21 This chip is a bit of a beast. It has 8 counters for measuring fan speed. It 28 that allows fan speed to be adjusted automatically based on any of the three 34 Each of the measured inputs (voltage, temperature, fan speed) has 35 corresponding high/low limit values. The ADT7462 will signal an ALARM if 43 ---------------- 45 The ADT7462 have a 10-bit ADC and can therefore measure temperatures 55 ------------------- 62 * pwm#_auto_point2_pwm and temp#_auto_point2_temp - 64 - point1: Set the pwm speed at a lower temperature bound. [all …]
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| D | adt7470.rst | 17 ----------- 22 The ADT7470 uses the 2-wire interface compatible with the SMBus 2.0 24 external temperatures. It has four (4) 16-bit counters for measuring fan speed. 25 There are four (4) PWM outputs that can be used to control fan speed. 28 that allows fan speed to be adjusted automatically based on any of the ten 34 Each of the measured inputs (temperature, fan speed) has corresponding high/low 40 automatic fan pwm control to set the fan speed. The driver will not read the 45 ---------------- 47 The ADT7470 has a 8-bit ADC and is capable of measuring temperatures with 1 54 ------------------- [all …]
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| D | amc6821.rst | 19 ----------- 22 The chip has one on-chip and one remote temperature sensor and one pwm fan 29 temp1_input ro on-chip temperature 46 fan1_input ro tachometer speed 51 fan1_target rw Target fan speed, to be used with pwm1_enable 57 combination of the on-chip temperature and 58 remote-sensor temperature, 72 temp1_auto_point2_temp rw The low-temperature limit of the proportional 79 speed. It can go from temp1_auto_point2_temp. 89 temp2_auto_point2_temp rw The low-temperature limit of the proportional [all …]
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| D | pc87427.rst | 21 ----------- 36 -------------- 38 Fan rotation speeds are reported as 14-bit values from a gated clock 41 An alarm is triggered if the rotation speed drops below a programmable 42 limit. Another alarm is triggered if the speed is too low to be measured 46 Fan Speed Control 47 ----------------- 49 Fan speed can be controlled by PWM outputs. There are 4 possible modes: 56 ---------------------- 60 connected. The integer part can be 8-bit or 9-bit, and can be signed or [all …]
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| /Documentation/devicetree/bindings/usb/ |
| D | usb.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Greg Kroah-Hartman <gregkh@linuxfoundation.org> 22 phy-names: 26 usb-phy: 27 $ref: /schemas/types.yaml#/definitions/phandle-array 38 UTMI+ PHY with an 8- or 16-bit interface if UTMI+ is selected, UTMI+ low 40 serial is specified and High-Speed Inter-Chip feature if HSIC is 46 maximum-speed: [all …]
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| D | microchip,usb5744.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Microchip USB5744 4-port Hub Controller 10 Microchip's USB5744 SmartHubTM IC is a 4 port, SuperSpeed (SS)/Hi-Speed (HS), 11 low power, low pin count configurable and fully compliant with the USB 3.1 12 Gen 1 specification. The USB5744 also supports Full Speed (FS) and Low Speed 19 - Michal Simek <michal.simek@amd.com> 20 - Mubin Sayyed <mubin.sayyed@amd.com> 21 - Radhey Shyam Pandey <radhey.shyam.pandey@amd.com> [all …]
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| /Documentation/ABI/testing/ |
| D | sysfs-bus-pci-drivers-ehci_hcd | 7 PCI-based EHCI USB controllers (i.e., high-speed USB-2.0 9 "companion" full/low-speed USB-1.1 controllers. When a 10 high-speed device is plugged in, the connection is routed 11 to the EHCI controller; when a full- or low-speed device 15 Sometimes you want to force a high-speed device to connect 16 at full speed, which can be accomplished by forcing the 23 For example: To force the high-speed device attached to 24 port 4 on bus 2 to run at full speed:: 28 To return the port to high-speed operation:: 30 echo -4 >/sys/bus/usb/devices/usb2/../companion [all …]
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| D | sysfs-bus-iio-vf610 | 3 Contact: linux-iio@vger.kernel.org 6 available modes are "normal", "high-speed" and "low-power", 12 Contact: linux-iio@vger.kernel.org 15 The two available modes are "high-power" and "low-power", 16 where "low-power" mode is the default mode.
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| /Documentation/admin-guide/pm/ |
| D | intel-speed-select.rst | 1 .. SPDX-License-Identifier: GPL-2.0 4 Intel(R) Speed Select Technology User Guide 7 The Intel(R) Speed Select Technology (Intel(R) SST) provides a powerful new 14 - https://www.intel.com/content/www/us/en/architecture-and-technology/speed-select-technology-artic… 15 - https://builders.intel.com/docs/networkbuilders/intel-speed-select-technology-base-frequency-enha… 19 dynamically without pre-configuring via BIOS setup options. This dynamic 21 and configure these features is by using the Intel Speed Select utility. 23 This document explains how to use the Intel Speed Select tool to enumerate and 29 intel-speed-select configuration tool 32 Most Linux distribution packages may include the "intel-speed-select" tool. If not, [all …]
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| /Documentation/usb/ |
| D | ehci.rst | 5 27-Dec-2002 7 The EHCI driver is used to talk to high speed USB 2.0 devices using 8 USB 2.0-capable host controller hardware. The USB 2.0 standard is 11 - "High Speed" 480 Mbit/sec (60 MByte/sec) 12 - "Full Speed" 12 Mbit/sec (1.5 MByte/sec) 13 - "Low Speed" 1.5 Mbit/sec 15 USB 1.1 only addressed full speed and low speed. High speed devices 23 (TT) in the hub, which turns low or full speed transactions into 24 high speed "split transactions" that don't waste transfer bandwidth. 31 While usb-storage devices have been available since mid-2001 (working [all …]
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| /Documentation/devicetree/bindings/clock/ |
| D | st,stm32mp25-rcc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/st,stm32mp25-rcc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Gabriel Fernandez <gabriel.fernandez@foss.st.com> 17 include/dt-bindings/clock/st,stm32mp25-rcc.h 18 include/dt-bindings/reset/st,stm32mp25-rcc.h 23 - st,stm32mp25-rcc 28 '#clock-cells': 31 '#reset-cells': [all …]
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| /Documentation/devicetree/bindings/net/bluetooth/ |
| D | mediatek,bluetooth.txt | 13 - compatible: Must be 14 "mediatek,mt7663u-bluetooth": for MT7663U device 15 "mediatek,mt7668u-bluetooth": for MT7668U device 16 - vcc-supply: Main voltage regulator 21 - pinctrl-names: Should be "default", "runtime" 22 - pinctrl-0: Should contain UART RXD low when the device is powered up to 24 - pinctrl-1: Should contain UART mode pin ctrl 30 - boot-gpios: GPIO same to the pin as UART RXD and used to keep LOW when 32 - pinctrl-names: Should be "default" 33 - pinctrl-0: Should contain UART mode pin ctrl [all …]
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| /Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe/ |
| D | usb.txt | 4 - compatible : should be "fsl,<chip>-qe-usb", "fsl,mpc8323-qe-usb". 5 - reg : the first two cells should contain usb registers location and 8 - interrupts : should contain USB interrupt. 9 - fsl,fullspeed-clock : specifies the full speed USB clock source: 11 "brg1" through "brg16": clock source is BRG1-BRG16, respectively 12 "clk1" through "clk24": clock source is CLK1-CLK24, respectively 13 - fsl,lowspeed-clock : specifies the low speed USB clock source: 15 "brg1" through "brg16": clock source is BRG1-BRG16, respectively 16 "clk1" through "clk24": clock source is CLK1-CLK24, respectively 17 - hub-power-budget : USB power budget for the root hub, in mA. [all …]
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| /Documentation/devicetree/bindings/phy/ |
| D | qcom,usb-hs-28nm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/qcom,usb-hs-28nm.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Synopsys DesignWare Core 28nm High-Speed PHY 10 - Bryan O'Donoghue <bryan.odonoghue@linaro.org> 13 Qualcomm Low-Speed, Full-Speed, Hi-Speed 28nm USB PHY 18 - qcom,usb-hs-28nm-femtophy 23 "#phy-cells": 28 - description: rpmcc ref clock [all …]
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| /Documentation/networking/device_drivers/ethernet/intel/ |
| D | e1000.rst | 1 .. SPDX-License-Identifier: GPL-2.0+ 8 Copyright(c) 1999 - 2013 Intel Corporation. 13 - Identifying Your Adapter 14 - Command Line Parameters 15 - Speed and Duplex Configuration 16 - Additional Configurations 17 - Support 40 For more information about the AutoNeg, Duplex, and Speed 41 parameters, see the "Speed and Duplex Configuration" section in 50 ------- [all …]
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| /Documentation/devicetree/bindings/memory-controllers/ddr/ |
| D | jedec,lpddr3-timings.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr3-timings.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: LPDDR3 SDRAM AC timing parameters for a given speed-bin 10 - Krzysztof Kozlowski <krzk@kernel.org> 14 const: jedec,lpddr3-timings 19 Maximum DDR clock frequency for the speed-bin, in Hz. 20 Property is deprecated, use max-freq. 23 max-freq: [all …]
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| /Documentation/cdrom/ |
| D | cdrom-standard.rst | 2 A Linux CD-ROM standard 14 Linux is probably the Unix-like operating system that supports 18 - The large list of hardware devices available for the many platforms 19 that Linux now supports (i.e., i386-PCs, Sparc Suns, etc.) 20 - The open design of the operating system, such that anybody can write a 22 - There is plenty of source code around as examples of how to write a driver. 29 This divergence of behavior has been very significant for CD-ROM 32 their drivers totally inconsistent, the writers of Linux CD-ROM 35 maintain uniform behavior across all the Linux CD-ROM drivers. 38 all the different CD-ROM device drivers for Linux. This document also [all …]
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| /Documentation/devicetree/bindings/mtd/ |
| D | lpc32xx-mlc.txt | 4 - compatible: "nxp,lpc3220-mlc" 5 - reg: Address and size of the controller 6 - interrupts: The NAND interrupt specification 7 - gpios: GPIO specification for NAND write protect 11 Hz, to make them independent of actual clock speed and to provide for good 13 - nxp,tcea_delay: TCEA_DELAY 14 - nxp,busy_delay: BUSY_DELAY 15 - nxp,nand_ta: NAND_TA 16 - nxp,rd_high: RD_HIGH 17 - nxp,rd_low: RD_LOW [all …]
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