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/Documentation/devicetree/bindings/rtc/
Dmaxim-ds1302.txt1 * Maxim/Dallas Semiconductor DS-1302 RTC
5 The device uses the standard MicroWire half-duplex transfer timing.
12 - compatible : Should be "maxim,ds1302"
16 - reg : Should be address of the device chip select within
19 - spi-max-frequency : DS-1302 has 500 kHz if powered at 2.2V,
22 - spi-3wire : The device has a shared signal IN/OUT line.
24 - spi-lsb-first : DS-1302 requires least significant bit first
27 - spi-cs-high: DS-1302 has active high chip select line. This is
33 #address-cells = <1>;
34 #size-cells = <0>;
[all …]
/Documentation/devicetree/bindings/spi/
Dicpdas-lp8841-spi-rtc.txt1 * ICP DAS LP-8841 SPI Controller for RTC
3 ICP DAS LP-8841 contains a DS-1302 RTC. RTC is connected to an IO
6 The device uses the standard MicroWire half-duplex transfer timing.
13 - #address-cells: should be 1
15 - #size-cells: should be 0
17 - compatible: should be "icpdas,lp8841-spi-rtc"
19 - reg: should provide IO memory address
23 - There can be only one slave device.
25 - The spi slave node should claim the following flags which are
28 - spi-3wire: The master itself has only 3 wire. It cannor work in
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Dspi-peripheral-props.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-peripheral-props.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Peripheral-specific properties for a SPI bus.
11 be common properties like spi-max-frequency, spi-cpha, etc. or they could be
13 need to be defined in the peripheral node because they are per-peripheral and
19 - Mark Brown <broonie@kernel.org>
27 - minimum: 0
32 spi-cs-high:
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/Documentation/devicetree/bindings/sound/
Dfsl,sai.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shengjiu Wang <shengjiu.wang@nxp.com>
21 - items:
22 - enum:
23 - fsl,imx6ul-sai
24 - fsl,imx7d-sai
25 - const: fsl,imx6sx-sai
27 - items:
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Dtdm-slot.txt6 dai-tdm-slot-num : Number of slots in use.
7 dai-tdm-slot-width : Width in bits for each slot.
8 dai-tdm-slot-tx-mask : Transmit direction slot mask, optional
9 dai-tdm-slot-rx-mask : Receive direction slot mask, optional
12 dai-tdm-slot-num = <2>;
13 dai-tdm-slot-width = <8>;
14 dai-tdm-slot-tx-mask = <0 1>;
15 dai-tdm-slot-rx-mask = <1 0>;
23 for an active slot as default, and the default active bits are at the LSB of
26 The explicit masks are given as array of integers, where the first
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/Documentation/userspace-api/media/v4l/
Dvidioc-g-sliced-vbi-cap.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
13 VIDIOC_G_SLICED_VBI_CAP - Query sliced VBI capabilities
43 The ``type`` field was added, and the ioctl changed from read-only
44 to write-read, in Linux 2.6.19.
50 .. flat-table:: struct v4l2_sliced_vbi_cap
51 :header-rows: 0
52 :stub-columns: 0
55 * - __u16
56 - ``service_set``
57 - :cspan:`2` A set of all data services supported by the driver.
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Ddev-sliced-vbi.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
17 :ref:`raw VBI interface <raw-vbi>`. The data is passed as short
51 .. _sliced-vbi-format-negotitation:
96 :ref:`VIDIOC_STREAMON` ioctl and the first
103 -----------------------------
115 .. flat-table::
116 :header-rows: 0
117 :stub-columns: 0
120 * - __u16
121 - ``service_set``
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Dcolorspaces-defs.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
7 In V4L2 colorspaces are defined by four values. The first is the
12 :c:type:`v4l2_xfer_func`) to specify non-standard
15 non-standard Y'CbCr encodings and the fourth is the quantization
17 specify non-standard quantization methods. Most of the time only the
22 .. _hsv-colorspace:
24 On :ref:`HSV formats <hsv-formats>` the *Hue* is defined as the angle on
26 degrees, i.e. 0-360. When we map this angle value into 8 bits, there are
27 two basic ways to do it: Divide the angular value by 2 (0-179), or use the
28 whole range, 0-255, dividing the angular value by 1.41. The enum
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Dpixfmt-yuv-planar.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. planar-yuv:
12 - Semi-planar formats use two planes. The first plane is the luma plane and
16 - Fully planar formats use three planes to store the Y, Cb and Cr components
26 and applications that support the multi-planar API, described in
27 :ref:`planar-apis`. Unless explicitly documented as supporting non-contiguous
31 Semi-Planar YUV Formats
35 use two planes, and store the luma components in the first plane and the chroma
46 For non-contiguous formats, no constraints are enforced by the format on the
57 .. flat-table:: Overview of Semi-Planar YUV Formats
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/Documentation/devicetree/bindings/thermal/
Darmada-thermal.txt5 - compatible: Should be set to one of the following:
6 * marvell,armada370-thermal
7 * marvell,armada375-thermal
8 * marvell,armada380-thermal
9 * marvell,armadaxp-thermal
10 * marvell,armada-ap806-thermal
11 * marvell,armada-ap807-thermal
12 * marvell,armada-cp110-thermal
16 Documentation/devicetree/bindings/arm/marvell/ap80x-system-controller.txt
17 Documentation/devicetree/bindings/arm/marvell/cp110-system-controller.txt
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/Documentation/ABI/testing/
Dsysfs-driver-tegra-fuse1 What: /sys/devices/*/<our-device>/fuse
4 Description: read-only access to the efuses on Tegra20, Tegra30, Tegra114
7 words in LSB first format. Each bit represents a single value
/Documentation/devicetree/bindings/dma/
Ddma-common.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/dma/dma-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vinod Koul <vkoul@kernel.org>
20 "#dma-cells":
27 dma-channel-mask:
31 kernel. i.e. first channel corresponds to LSB.
32 The first item in the array is for channels 0-31, the second is for
33 channels 32-63, etc.
[all …]
Dbrcm,bcm2835-dma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/brcm,bcm2835-dma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Nicolas Saenz Julienne <nsaenz@kernel.org>
19 - $ref: dma-controller.yaml#
23 const: brcm,bcm2835-dma
35 interrupt-names:
39 '#dma-cells':
43 brcm,dma-channel-mask:
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/Documentation/hwmon/
Dsmsc47b397.rst6 * SMSC LPC47B397-NC
8 * SMSC SCH5307-NS
20 - Mark M. Hoffman <mhoffman@lightlink.com>
21 - Utilitek Systems, Inc.
25 The following specification describes the SMSC LPC47B397-NC [1]_ sensor chip
27 provided by Craig Kelly (In-Store Broadcast Network) and edited/corrected
30 .. [1] And SMSC SCH5307-NS and SCH5317, which have different device IDs but are
33 -------------------------------------------------------------------------
36 -------------------------------------------------------------------------
42 and 0x61 (LSB). Currently we are using 0x480 for the HWM Base Address and
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Dvt1211.rst10 Addresses scanned: none, address read from Super-I/O config space
24 -----------------
29 configuration for channels 1-5.
30 Legal values are in the range of 0-31. Bit 0 maps to
47 -----------
49 The VIA VT1211 Super-I/O chip includes complete hardware monitoring
52 implements 5 universal input channels (UCH1-5) that can be individually
60 connected to the PWM outputs of the VT1211 :-().
80 ------------------
82 Voltages are sampled by an 8-bit ADC with a LSB of ~10mV. The supported input
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/Documentation/admin-guide/
Dlcd-panel-cgram.rst8 number, and up to 8 couples of hex digits terminated by a semi-colon
9 (';'). Each couple of digits represents a line, with 1-bits for each
10 illuminated pixel with LSB on the right. Lines are numbered from the
12 bits of the 7 first bytes are used for each character. If the string
19 printf "\e[LG3040E1F001F0E0400;" => 3 = [up-down]
/Documentation/input/devices/
Diforce-protocol.rst7 Home page at `<http://web.archive.org/web/*/http://www.esil.univ-mrs.fr>`_
16 specify force effects to I-Force 2.0 devices. None of this information comes
25 send data to your I-Force device based on what you read in this document.
30 All values are hexadecimal with big-endian encoding (msb on the left). Beware,
31 values inside packets are encoded using little-endian. Bytes whose roles are
35 ------------------------
54 First, I describe effects that are sent by the device to the computer
64 00 X-Axis lsb
65 01 X-Axis msb
66 02 Y-Axis lsb, or gas pedal for a wheel
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/Documentation/devicetree/bindings/powerpc/fsl/
Dmpic-msgr.txt9 - compatible: Specifies the compatibility list for the message register
10 block. The type shall be <string-list> and the value shall be of the form
11 "fsl,mpic-v<version>-msgr", where <version> is the version number of
14 - reg: Specifies the base physical address(s) and size(s) of the
16 <prop-encoded-array>.
18 - interrupts: Specifies a list of interrupt-specifiers which are available
19 for receiving interrupts. Interrupt-specifier consists of two cells: first
20 cell is interrupt-number and second cell is level-sense. The type shall be
21 <prop-encoded-array>.
25 - mpic-msgr-receive-mask: Specifies what registers in the containing block
[all …]
/Documentation/virt/kvm/x86/
Dtimekeeping.rst1 .. SPDX-License-Identifier: GPL-2.0
4 Timekeeping Virtualization for X86-Based Architectures
26 First, we will describe the various timekeeping hardware available, then
32 information relevant to KVM and hardware-based virtualization.
37 First we discuss the basic hardware devices available. TSC and the related
41 2.1. i8254 - PIT
42 ----------------
44 One of the first timer devices available is the programmable interrupt timer,
46 channels which can be programmed to deliver periodic or one-shot interrupts.
53 The PIT uses I/O ports 0x40 - 0x43. Access to the 16-bit counters is done
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/Documentation/bpf/
Dclassic_vs_extended.rst12 - Number of registers increase from 2 to 10:
15 new layout extends this to be 10 internal registers and a read-only frame
16 pointer. Since 64-bit CPUs are passing arguments to functions via registers
17 the number of args from eBPF program to in-kernel function is restricted
18 to 5 and one register is used to accept return value from an in-kernel
19 function. Natively, x86_64 passes first 6 arguments in registers, aarch64/
20 sparcv9/mips64 have 7 - 8 registers for arguments; x86_64 has 6 callee saved
25 64-bit architectures.
27 On 32-bit architectures JIT may map programs that use only 32-bit arithmetic
30 R0 - R5 are scratch registers and eBPF program needs spill/fill them if
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/Documentation/devicetree/bindings/clock/
Dst,stm32-rcc.txt6 Please refer to clock-bindings.txt for common clock controller binding usage.
10 - compatible: Should be:
11 "st,stm32f42xx-rcc"
12 "st,stm32f469-rcc"
13 "st,stm32f746-rcc"
14 "st,stm32f769-rcc"
16 - reg: should be register base and length as documented in the
18 - #reset-cells: 1, see below
19 - #clock-cells: 2, device nodes should specify the clock in their "clocks"
23 - clocks: External oscillator clock phandle
[all …]
/Documentation/driver-api/media/drivers/
Dradiotrack.rst1 .. SPDX-License-Identifier: GPL-2.0
11 ----------------
24 ------------------
26 I have a RadioTrack card from back when I ran an MS-Windows platform. After
27 converting to Linux, I found Gideon le Grange's command-line software for
29 comfortable X-windows interface, and added a scanning feature. For hack
32 broadcast TV channels, situated just below and above the 87.0-109.0 MHz range.
40 --------------------
42 The RadioTrack card is an ISA 8-bit FM radio card. The radio frequency (RF)
54 --------------------------------
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/Documentation/spi/
Dspidev.rst5 SPI devices have a limited userspace API, supporting basic half-duplex
19 * Prototyping in an environment that's not crash-prone; stray pointers
38 - struct spi_device_id spidev_spi_ids[]: list of devices that can be
42 - struct of_device_id spidev_dt_ids[]: list of devices that can be
46 - struct acpi_device_id spidev_acpi_ids[]: list of devices that can
52 post a patch for spidev to the linux-spi@vger.kernel.org mailing list.
101 Since this is a standard Linux device driver -- even though it just happens
102 to expose a low level API to userspace -- it can be associated with any number
112 Standard read() and write() operations are obviously only half-duplex, and
113 the chipselect is deactivated between those operations. Full-duplex access,
[all …]
Dspi-summary.rst5 02-Feb-2012
8 ------------
17 clocking modes through which data is exchanged; mode-0 and mode-3 are most
32 - SPI may be used for request/response style device protocols, as with
35 - It may also be used to stream data in either direction (half duplex),
38 - Some devices may use eight bit words. Others may use different word
39 lengths, such as streams of 12-bit or 20-bit digital samples.
41 - Words are usually sent with their most significant bit (MSB) first,
42 but sometimes the least significant bit (LSB) goes first instead.
44 - Sometimes SPI is used to daisy-chain devices, like shift registers.
[all …]
/Documentation/networking/
Darcnet-hardware.rst1 .. SPDX-License-Identifier: GPL-2.0
11 2) This file is no longer Linux-specific. It should probably be moved out
17 e-mail apenwarr@worldvisions.ca with any settings for your particular card,
27 First of all, you can get ARCnet cards in at least two speeds: 2.5 Mbps
39 There are two "types" of ARCnet - STAR topology and BUS topology. This
46 well-designed standard. It uses something called "modified token passing"
47 which makes it completely incompatible with so-called "Token Ring" cards,
63 programming interface also means that when high-performance hardware
73 although they are generally kept down to the Ethernet-style 1500 bytes.
91 - Avery Pennraun <apenwarr@worldvisions.ca>
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