Searched +full:max +full:- +full:link +full:- +full:speed (Results 1 – 25 of 56) sorted by relevance
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| /Documentation/devicetree/bindings/pci/ |
| D | ti,j721e-pci-ep.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/ 4 --- 5 $id: http://devicetree.org/schemas/pci/ti,j721e-pci-ep.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Kishon Vijay Abraham I <kishon@ti.com> 16 - const: ti,j721e-pcie-ep 17 - const: ti,j784s4-pcie-ep 18 - description: PCIe EP controller in AM64 20 - const: ti,am64-pcie-ep [all …]
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| D | ti,am65-pci-ep.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 # Copyright (C) 2021 Texas Instruments Incorporated - http://www.ti.com/ 4 --- 5 $id: http://devicetree.org/schemas/pci/ti,am65-pci-ep.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Kishon Vijay Abraham I <kishon@ti.com> 14 - $ref: pci-ep.yaml# 19 - ti,am654-pcie-ep 24 reg-names: 26 - const: app [all …]
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| D | rcar-gen4-pci-ep.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 # Copyright (C) 2022-2023 Renesas Electronics Corp. 4 --- 5 $id: http://devicetree.org/schemas/pci/rcar-gen4-pci-ep.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: Renesas R-Car Gen4 PCIe Endpoint 11 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> 14 - $ref: snps,dw-pcie-ep.yaml# 19 - enum: 20 - renesas,r8a779f0-pcie-ep # R-Car S4-8 [all …]
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| D | baikal,bt1-pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/baikal,bt1-pcie.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Baikal-T1 PCIe Root Port Controller 10 - Serge Semin <fancer.lancer@gmail.com> 13 Embedded into Baikal-T1 SoC Root Complex controller with a single port 14 activated. It's based on the DWC RC PCIe v4.60a IP-core, which is configured 16 link up to Gen.3 speed on x4 lanes. It doesn't have embedded clock and reset 18 performed by software. There four in- and four outbound iATU regions [all …]
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| D | intel-gw-pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/intel-gw-pcie.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Rahul Tanwar <rtanwar@maxlinear.com> 16 const: intel,lgm-pcie 18 - compatible 21 - $ref: /schemas/pci/snps,dw-pcie.yaml# 26 - const: intel,lgm-pcie 27 - const: snps,dw-pcie [all …]
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| D | toshiba,visconti-pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/toshiba,visconti-pcie.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> 16 - $ref: /schemas/pci/snps,dw-pcie.yaml# 20 const: toshiba,visconti-pcie 24 - description: Data Bus Interface (DBI) registers. 25 - description: PCIe configuration space region. 26 - description: Visconti specific additional registers. [all …]
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| D | pci.txt | 3 PCI Bus Binding to: IEEE Std 1275-1994 4 https://www.devicetree.org/open-firmware/bindings/pci/pci2_1.pdf 9 https://www.devicetree.org/open-firmware/practice/imap/imap0_9d.pdf 14 - linux,pci-domain: 21 - max-link-speed: 22 If present this property specifies PCI gen for link capability. Host 24 unsupported link speed, for instance, trying to do training for 25 unsupported link speed, etc. Must be '4' for gen4, '3' for gen3, '2' 27 - reset-gpios: 30 - supports-clkreq: [all …]
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| D | pci-ep.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/pci-ep.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 13 - Kishon Vijay Abraham I <kishon@kernel.org> 14 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> 18 pattern: "^pcie-ep@" 20 max-functions: 27 max-virtual-functions: 30 $ref: /schemas/types.yaml#/definitions/uint8-array [all …]
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| D | ti,j721e-pci-host.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 # Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ 4 --- 5 $id: http://devicetree.org/schemas/pci/ti,j721e-pci-host.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Kishon Vijay Abraham I <kishon@ti.com> 16 - const: ti,j721e-pcie-host 17 - const: ti,j784s4-pcie-host 18 - description: PCIe controller in AM64 20 - const: ti,am64-pcie-host [all …]
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| D | rcar-gen4-pci-host.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 # Copyright (C) 2022-2023 Renesas Electronics Corp. 4 --- 5 $id: http://devicetree.org/schemas/pci/rcar-gen4-pci-host.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: Renesas R-Car Gen4 PCIe Host 11 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> 14 - $ref: snps,dw-pcie.yaml# 19 - enum: 20 - renesas,r8a779f0-pcie # R-Car S4-8 [all …]
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| D | ti,am65-pci-host.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 # Copyright (C) 2021 Texas Instruments Incorporated - http://www.ti.com/ 4 --- 5 $id: http://devicetree.org/schemas/pci/ti,am65-pci-host.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Kishon Vijay Abraham I <kishon@ti.com> 14 - $ref: /schemas/pci/pci-host-bridge.yaml# 19 - ti,am654-pcie-rc 20 - ti,keystone-pcie 25 reg-names: [all …]
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| D | snps,dw-pcie-ep.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/pci/snps,dw-pcie-ep.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jingoo Han <jingoohan1@gmail.com> 11 - Gustavo Pimentel <gustavo.pimentel@synopsys.com> 16 # Please create a separate DT-schema for your DWC PCIe Endpoint controller 17 # and make sure it's assigned with the vendor-specific compatible string. 21 const: snps,dw-pcie-ep 23 - compatible [all …]
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| D | aardvark-pci.txt | 8 - compatible: Should be "marvell,armada-3700-pcie" 9 - reg: range of registers for the PCIe controller 10 - interrupts: the interrupt line of the PCIe controller 11 - #address-cells: set to <3> 12 - #size-cells: set to <2> 13 - device_type: set to "pci" 14 - ranges: ranges for the PCI memory and I/O regions 15 - #interrupt-cells: set to <1> 16 - msi-controller: indicates that the PCIe controller can itself 18 - msi-parent: pointer to the MSI controller to be used [all …]
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| D | snps,dw-pcie-common.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/snps,dw-pcie-common.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jingoo Han <jingoohan1@gmail.com> 11 - Gustavo Pimentel <gustavo.pimentel@synopsys.com> 23 Interface - DBI. In accordance with the reference manual the register 24 configuration space belongs to the Configuration-Dependent Module (CDM) 25 and is split up into several sub-parts Standard PCIe configuration 26 space, Port Logic Registers (PL), Shadow Config-space Registers, [all …]
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| /Documentation/devicetree/bindings/net/ |
| D | ethernet-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/net/ethernet-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - David S. Miller <davem@davemloft.net> 19 local-mac-address: 22 $ref: /schemas/types.yaml#/definitions/uint8-array 26 mac-address: 31 local-mac-address property. 32 $ref: /schemas/types.yaml#/definitions/uint8-array [all …]
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| D | brcm,bcmgenet.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Doug Berger <opendmb@gmail.com> 11 - Florian Fainelli <f.fainelli@gmail.com> 16 - brcm,genet-v1 17 - brcm,genet-v2 18 - brcm,genet-v3 19 - brcm,genet-v4 20 - brcm,genet-v5 [all …]
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| /Documentation/devicetree/bindings/net/dsa/ |
| D | microchip,lan937x.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - UNGLinuxDriver@microchip.com 13 - $ref: dsa.yaml#/$defs/ethernet-ports 18 - microchip,lan9370 19 - microchip,lan9371 20 - microchip,lan9372 21 - microchip,lan9373 22 - microchip,lan9374 [all …]
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| D | microchip,ksz.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Marek Vasut <marex@denx.de> 11 - Woojung Huh <Woojung.Huh@microchip.com> 14 - $ref: /schemas/spi/spi-peripheral-props.yaml# 21 - microchip,ksz8765 22 - microchip,ksz8794 23 - microchip,ksz8795 24 - microchip,ksz8863 [all …]
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| D | vitesse,vsc73xx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Linus Walleij <linus.walleij@linaro.org> 13 The Vitesse DSA Switches were produced in the early-to-mid 2000s. 19 Vitesse VSC7385 SparX-G5 5+1-port Integrated Gigabit Ethernet Switch 20 Vitesse VSC7388 SparX-G8 8-port Integrated Gigabit Ethernet Switch 21 Vitesse VSC7395 SparX-G5e 5+1-port Integrated Gigabit Ethernet Switch 22 Vitesse VSC7398 SparX-G8e 8-port Integrated Gigabit Ethernet Switch 27 reside inside a SPI bus device tree node, see spi/spi-bus.txt [all …]
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| /Documentation/networking/device_drivers/ethernet/netronome/ |
| D | nfp.rst | 1 .. SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 14 - `Overview`_ 15 - `Acquiring Firmware`_ 16 - `Devlink Info`_ 17 - `Configure Device`_ 18 - `Statistics`_ 25 are also incorporated in the companies' family of Agilio SmartNICs. The SR-IOV 35 Firmware files on the host filesystem contain card type (`AMDA-*` string), media 40 `linux-firmware.git` repository. 46 ----------------- [all …]
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| /Documentation/networking/device_drivers/can/ |
| D | can327.rst | 1 .. SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) 7 -------- 9 Max Staudt <max@enpas.org> 14 ----------- 26 ------------- 33 order to fake full-duplex operation. 36 enough to implement simple request-response protocols (such as OBD II), 50 ----------- 59 ---------------------------------- 68 --debug \ [all …]
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| /Documentation/networking/device_drivers/ethernet/intel/ |
| D | i40e.rst | 1 .. SPDX-License-Identifier: GPL-2.0+ 8 Copyright(c) 1999-2018 Intel Corporation. 13 - Overview 14 - Identifying Your Adapter 15 - Intel(R) Ethernet Flow Director 16 - Additional Configurations 17 - Known Issues 18 - Support 47 ---------------------- 49 …intel.com/content/dam/www/public/us/en/documents/release-notes/xl710-ethernet-controller-feature-m… [all …]
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| /Documentation/netlink/specs/ |
| D | ethtool.yaml | 1 # SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 5 protocol: genetlink-legacy 10 - 11 name: udp-tunnel-type 12 enum-name: 14 entries: [ vxlan, geneve, vxlan-gpe ] 15 - 19 - 20 name: header-flags 22 entries: [ compact-bitsets, omit-reply, stats ] [all …]
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| /Documentation/devicetree/bindings/usb/ |
| D | snps,dwc3.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Felipe Balbi <balbi@kernel.org> 14 be presented as a standalone DT node with an optional vendor-specific 18 - $ref: usb-drd.yaml# 19 - if: 25 - dr_mode 29 $ref: usb-xhci.yaml# 35 - const: snps,dwc3 [all …]
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| /Documentation/filesystems/ |
| D | squashfs.rst | 1 .. SPDX-License-Identifier: GPL-2.0 7 Squashfs is a compressed read-only filesystem for Linux. 14 Squashfs is intended for general read-only filesystem use, for archival 19 Mailing list: squashfs-devel@lists.sourceforge.net 23 ---------------------- 30 Max filesystem size 2^64 256 MiB 31 Max file size ~ 2 TiB 16 MiB 32 Max files unlimited unlimited 33 Max directories unlimited unlimited 34 Max entries per directory unlimited unlimited [all …]
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