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/drivers/pwm/
Dpwm-meson.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
3 * PWM controller driver for Amlogic Meson SoCs.
13 * Setting the duty cycle will disable and re-enable the PWM output.
19 * https://dl.khadas.com/Hardware/VIM2/Datasheet/S912_Datasheet_V0.220170314publicversion-Wesion.pdf
23 * https://dn.odroid.com/S922X/ODROID-N2/Datasheet/S922X_Public_Datasheet_V0.2.pdf
33 #include <linux/clk-provider.h>
122 struct meson_pwm *meson = to_meson_pwm(chip); in meson_pwm_request() local
123 struct meson_pwm_channel *channel = &meson->channels[pwm->hwpwm]; in meson_pwm_request()
124 struct device *dev = pwmchip_parent(chip); in meson_pwm_request()
127 err = clk_prepare_enable(channel->clk); in meson_pwm_request()
[all …]
/drivers/spi/
Dspi-meson-spifc.c1 // SPDX-License-Identifier: GPL-2.0+
3 // Driver for Amlogic Meson SPI flash controller (SPIFC)
10 #include <linux/device.h>
56 #define USER_UC_MASK ((BIT(5) - 1) << 27)
71 * @regmap: regmap for device registers
72 * @clk: input clock of the built-in baud rate generator
73 * @dev: the device structure
79 struct device *dev;
90 * meson_spifc_wait_ready() - wait for the current operation to terminate
91 * @spifc: the Meson SPI device
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/drivers/gpu/drm/ci/
Dtest.yml1 .test-rules:
3 - if: '$FD_FARM == "offline" && $RUNNER_TAG =~ /^google-freedreno-/'
5 - if: '$COLLABORA_FARM == "offline" && $RUNNER_TAG =~ /^mesa-ci-x86-64-lava-/'
7 - !reference [.no_scheduled_pipelines-rules, rules]
8 - when: on_success
10 .lava-test:
12 - .test-rules
16 - rm -rf install
17 - tar -xf artifacts/install.tar
18 - mv install/* artifacts/.
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/drivers/gpu/drm/meson/
Dmeson_drv.c1 // SPDX-License-Identifier: GPL-2.0-or-later
16 #include <linux/soc/amlogic/meson-canvas.h>
42 #define DRIVER_NAME "meson"
43 #define DRIVER_DESC "Amlogic Meson DRM driver"
53 * - Full reset of entire video processing HW blocks
54 * - Scaling and setup of the VPU clock
55 * - Bus clock gates
56 * - Powering up video processing HW blocks
57 * - Powering Up HDMI controller and PHY
73 struct meson_drm *priv = dev->dev_private; in meson_irq()
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Dmeson_dw_hdmi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
32 #define DRIVER_NAME "meson-dw-hdmi"
33 #define DRIVER_DESC "Amlogic Meson HDMI-TX DRM driver"
40 * - A Synopsys DesignWare HDMI Controller IP
41 * - A TOP control block controlling the Clocks and PHY
42 * - A custom HDMI PHY in order convert video to TMDS signal
79 * - HPD Rise & Fall interrupt
80 * - HDMI Controller Interrupt
81 * - HDMI PHY Init for 480i to 1080p60
82 * - VENC & HDMI Clock setup for 480i to 1080p60
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/drivers/nvmem/
Dmeson-efuse.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Amlogic Meson GX eFuse Driver
11 #include <linux/nvmem-provider.h>
15 #include <linux/firmware/meson/meson_sm.h>
42 { .compatible = "amlogic,meson-gxbb-efuse", },
49 struct device *dev = &pdev->dev; in meson_efuse_probe()
56 of_parse_phandle(pdev->dev.of_node, "secure-monitor", 0); in meson_efuse_probe()
59 dev_err(&pdev->dev, "no secure-monitor node\n"); in meson_efuse_probe()
60 return -ENODEV; in meson_efuse_probe()
65 return -EPROBE_DEFER; in meson_efuse_probe()
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/drivers/pinctrl/meson/
Dpinctrl-meson-axg-pmx.c1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Second generation of pinmux driver for Amlogic Meson-AXG SoC.
14 * Meson-AXG SoC and later series, which use 4-width continuous
20 #include <linux/device.h>
25 #include "pinctrl-meson.h"
26 #include "pinctrl-meson-axg-pmx.h"
33 const struct meson_axg_pmx_data *pmx = pc->data->pmx_data; in meson_axg_pmx_get_bank()
35 for (i = 0; i < pmx->num_pmx_banks; i++) in meson_axg_pmx_get_bank()
36 if (pin >= pmx->pmx_banks[i].first && in meson_axg_pmx_get_bank()
37 pin <= pmx->pmx_banks[i].last) { in meson_axg_pmx_get_bank()
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Dpinctrl-meson8-pmx.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * First generation of pinmux driver for Amlogic Meson SoCs
13 #include <linux/device.h>
18 #include "pinctrl-meson.h"
19 #include "pinctrl-meson8-pmx.h"
22 * meson8_pmx_disable_other_groups() - disable other groups using a given pin
24 * @pc: meson pin controller device
26 * @sel_group: index of the selected group, or -1 if none
29 * selected one. If @sel_group is -1 all groups are disabled, leaving
39 for (i = 0; i < pc->data->num_groups; i++) { in meson8_pmx_disable_other_groups()
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/drivers/media/cec/platform/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
18 tristate "Amlogic Meson AO CEC driver"
23 This is a driver for Amlogic Meson SoCs AO CEC interface. It uses the
28 tristate "Amlogic Meson G12A AO CEC driver"
36 This is a driver for Amlogic Meson G12A SoCs AO CEC interface.
37 This driver if for the new AO-CEC module found in G12A SoCs,
44 tristate "Generic GPIO-based CEC driver"
51 This is a generic GPIO-based CEC driver.
108 Selecting it will enable support for this device.
118 SECO Boards Consumer-IR in seco-cec driver.
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/drivers/char/hw_random/
Dmeson-rng.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
32 struct device *dev;
40 *(u32 *)buf = readl_relaxed(data->base + RNG_DATA); in meson_rng_read()
54 return -EBUSY; in meson_rng_wait_status()
64 void __iomem *cfg_addr = data->base + RNG_S4_CFG; in meson_s4_rng_read()
71 dev_err(data->dev, "Seed isn't ready, try again\n"); in meson_s4_rng_read()
77 dev_err(data->dev, "Can't get random number, try again\n"); in meson_s4_rng_read()
81 *(u32 *)buf = readl_relaxed(data->base + RNG_S4_DATA); in meson_s4_rng_read()
88 struct device *dev = &pdev->dev; in meson_rng_probe()
95 return -ENOMEM; in meson_rng_probe()
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/drivers/iio/adc/
Dmeson_saradc.c1 // SPDX-License-Identifier: GPL-2.0
3 * Amlogic Meson Successive Approximation Register (SAR) A/D Converter
10 #include <linux/clk-provider.h>
16 #include <linux/nvmem-consumer.h>
96 (8 + (((_chan) - 2) * 3))
153 * and u-boot source served as reference). These only seem to be relevant on
350 /* lock to protect against multiple access to the device */
380 for (i = 0; i < indio_dev->num_channels; i++) in find_channel_by_num()
381 if (indio_dev->channels[i].channel == num) in find_channel_by_num()
382 return &indio_dev->channels[i]; in find_channel_by_num()
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/drivers/net/ethernet/stmicro/stmmac/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "STMicroelectronics Multi-Gigabit Ethernet driver"
36 STi, Allwinner, Amlogic Meson, Altera SOCFPGA.
45 tristate "Support for snps,dwc-qos-ethernet.txt DT binding."
50 Support for chips using the snps,dwc-qos-ethernet.txt DT binding.
78 device driver. This driver is used on for the Ingenic SoCs
90 device driver. This driver does not use any of the hardware
92 will behave like standard non-accelerated ethernet interfaces.
114 tristate "Amlogic Meson dwmac support"
118 Support for Ethernet controller on Amlogic Meson SoCs.
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/drivers/i2c/busses/
Di2c-meson.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * I2C bus driver for Amlogic Meson SoCs
21 /* Meson I2C register map */
68 * struct meson_i2c - Meson I2C device private data
71 * @dev: Pointer to device structure
72 * @regs: Base address of the device memory mapped registers
82 * @tokens: Sequence of tokens to be written to the device
88 struct device *dev;
116 data = readl(i2c->regs + reg); in meson_i2c_set_mask()
119 writel(data, i2c->regs + reg); in meson_i2c_set_mask()
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/drivers/media/rc/
Dmeson-ir-tx.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * meson-ir-tx.c - Amlogic Meson IR TX driver
10 #include <linux/device.h>
20 #include <media/rc-core.h>
22 #define DEVICE_NAME "Meson IR TX"
23 #define DRIVER_NAME "meson-ir-tx"
39 #define IRB_DELAY_MASK (IRB_MAX_DELAY - 1)
51 #define IRB_MOD_COUNT(lo, hi) ((((lo) - 1) << 16) | ((hi) - 1))
66 struct device *dev;
81 unsigned int cnt = DIV_ROUND_CLOSEST(ir->clk_rate, ir->carrier); in meson_irtx_set_mod()
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
15 Say Y when you have a TV or an IR device.
25 Allow attaching eBPF programs to a lirc device using the bpf(2)
80 tristate "Enable IR raw decoder for the RC-5 protocol"
84 Enable this option if you have IR with RC-5 protocol, and
96 tristate "Enable IR raw decoder for the RC-MM protocol"
98 Enable this option when you have IR with RC-MM protocol, and
100 24 and 32 bits RC-MM variants. You can enable or disable the
102 'rc-mm-12', 'rc-mm-24' and 'rc-mm-32'.
105 will be called ir-rcmm-decoder.
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Dmeson-ir.c1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for Amlogic Meson IR remote receiver
8 #include <linux/device.h>
19 #include <media/rc-core.h>
21 #define DRIVER_NAME "meson-ir"
54 /* Meson 6b uses REG1 to configure IR mode */
57 /* The following registers are only available on Meson 8b and newer */
64 /* Meson 8b / GXBB use REG2 to configure IR mode */
97 * struct meson_ir_protocol - describe IR Protocol parameter
100 * @repeat_counter_enable: enable frame-to-frame time counter, it should work
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/drivers/watchdog/
Dmeson_gxbb_wdt.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
26 #define GXBB_WDT_CTRL_DIV_MASK (BIT(18) - 1)
28 #define GXBB_WDT_TCNT_SETUP_MASK (BIT(16) - 1)
55 writel(readl(data->reg_base + GXBB_WDT_CTRL_REG) | GXBB_WDT_CTRL_EN, in meson_gxbb_wdt_start()
56 data->reg_base + GXBB_WDT_CTRL_REG); in meson_gxbb_wdt_start()
65 writel(readl(data->reg_base + GXBB_WDT_CTRL_REG) & ~GXBB_WDT_CTRL_EN, in meson_gxbb_wdt_stop()
66 data->reg_base + GXBB_WDT_CTRL_REG); in meson_gxbb_wdt_stop()
75 writel(0, data->reg_base + GXBB_WDT_RSET_REG); in meson_gxbb_wdt_ping()
89 wdt_dev->timeout = timeout; in meson_gxbb_wdt_set_timeout()
93 writel(tcnt, data->reg_base + GXBB_WDT_TCNT_REG); in meson_gxbb_wdt_set_timeout()
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/drivers/tty/serial/
Dmeson_uart.c1 // SPDX-License-Identifier: GPL-2.0
102 val = readl(port->membase + AML_UART_STATUS); in meson_uart_tx_empty()
111 val = readl(port->membase + AML_UART_CONTROL); in meson_uart_stop_tx()
113 writel(val, port->membase + AML_UART_CONTROL); in meson_uart_stop_tx()
120 val = readl(port->membase + AML_UART_CONTROL); in meson_uart_stop_rx()
122 writel(val, port->membase + AML_UART_CONTROL); in meson_uart_stop_rx()
130 free_irq(port->irq, port); in meson_uart_shutdown()
134 val = readl(port->membase + AML_UART_CONTROL); in meson_uart_shutdown()
137 writel(val, port->membase + AML_UART_CONTROL); in meson_uart_shutdown()
144 struct tty_port *tport = &port->state->port; in meson_uart_start_tx()
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/drivers/reset/
Dreset-meson-audio-arb.c1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
10 #include <linux/reset-controller.h>
13 #include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
67 spin_lock(&arb->lock); in meson_audio_arb_update()
68 val = readl(arb->regs); in meson_audio_arb_update()
71 val &= ~BIT(arb->reset_bits[id]); in meson_audio_arb_update()
73 val |= BIT(arb->reset_bits[id]); in meson_audio_arb_update()
75 writel(val, arb->regs); in meson_audio_arb_update()
76 spin_unlock(&arb->lock); in meson_audio_arb_update()
88 val = readl(arb->regs); in meson_audio_arb_status()
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/drivers/firmware/meson/
Dmeson_sm.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #define pr_fmt(fmt) "meson-sm: " fmt
11 #include <linux/arm-smccc.h>
24 #include <linux/firmware/meson/meson_sm.h>
63 const struct meson_sm_cmd *cmd = chip->cmd; in meson_sm_get_cmd()
65 while (cmd->smc_id && cmd->index != cmd_index) in meson_sm_get_cmd()
68 return cmd->smc_id; in meson_sm_get_cmd()
92 * meson_sm_call - generic SMC32 call to the secure-monitor
94 * @fw: Pointer to secure-monitor firmware
111 if (!fw->chip) in meson_sm_call()
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/drivers/usb/dwc3/
Ddwc3-meson-g12a.c1 // SPDX-License-Identifier: GPL-2.0
11 * - Control registers for each USB2 Ports
12 * - Control registers for the USB PHY layer
13 * - SuperSpeed PHY can be enabled only if port is used
14 * - Dynamic OTG switching with ID change interrupt
33 /* USB2 Ports Control Registers, offsets are per-port */
120 "usb2-phy0", "usb2-phy1", "usb2-phy2",
124 "usb2-phy0", "usb2-phy1", "usb3-phy0",
133 * correctly when only the "usb2-phy1" phy is specified on-par with the
137 "usb2-phy0", "usb2-phy1"
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/drivers/rtc/
Drtc-meson.c1 // SPDX-License-Identifier: GPL-2.0
19 #include <linux/nvmem-provider.h>
46 /* rtc registers accessed via rtc-serial interface */
62 struct rtc_device *rtc; /* rtc device we created */
63 struct device *dev; /* device we bound from */
71 .name = "peripheral-registers",
79 /* RTC front-end serialiser controls */
84 regmap_update_bits(rtc->peripheral, RTC_ADDR0, RTC_ADDR0_LINE_SCLK, 0); in meson_rtc_sclk_pulse()
86 regmap_update_bits(rtc->peripheral, RTC_ADDR0, RTC_ADDR0_LINE_SCLK, in meson_rtc_sclk_pulse()
92 regmap_update_bits(rtc->peripheral, RTC_ADDR0, RTC_ADDR0_LINE_SDI, in meson_rtc_send_bit()
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Drtc-meson-vrtc.c1 // SPDX-License-Identifier: GPL-2.0
21 static int meson_vrtc_read_time(struct device *dev, struct rtc_time *tm) in meson_vrtc_read_time()
35 writel_relaxed(time, vrtc->io_alarm); in meson_vrtc_set_wakeup_time()
38 static int meson_vrtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm) in meson_vrtc_set_alarm()
42 dev_dbg(dev, "%s: alarm->enabled=%d\n", __func__, alarm->enabled); in meson_vrtc_set_alarm()
43 if (alarm->enabled) in meson_vrtc_set_alarm()
44 vrtc->alarm_time = rtc_tm_to_time64(&alarm->time); in meson_vrtc_set_alarm()
46 vrtc->alarm_time = 0; in meson_vrtc_set_alarm()
51 static int meson_vrtc_alarm_irq_enable(struct device *dev, unsigned int enabled) in meson_vrtc_alarm_irq_enable()
55 vrtc->enabled = enabled; in meson_vrtc_alarm_irq_enable()
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/drivers/phy/amlogic/
Dphy-meson-g12a-mipi-dphy-analog.c1 // SPDX-License-Identifier: GPL-2.0
3 * Meson G12A MIPI DSI Analog PHY
18 #include <dt-bindings/phy/phy.h>
51 ret = phy_mipi_dphy_config_validate(&opts->mipi_dphy); in phy_g12a_mipi_dphy_analog_configure()
55 memcpy(&priv->config, opts, sizeof(priv->config)); in phy_g12a_mipi_dphy_analog_configure()
65 regmap_write(priv->regmap, HHI_MIPI_CNTL0, in phy_g12a_mipi_dphy_analog_power_on()
69 regmap_write(priv->regmap, HHI_MIPI_CNTL1, in phy_g12a_mipi_dphy_analog_power_on()
73 regmap_write(priv->regmap, HHI_MIPI_CNTL2, in phy_g12a_mipi_dphy_analog_power_on()
78 switch (priv->config.lanes) { in phy_g12a_mipi_dphy_analog_power_on()
95 regmap_update_bits(priv->regmap, HHI_MIPI_CNTL2, in phy_g12a_mipi_dphy_analog_power_on()
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Dphy-meson-gxl-usb2.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Meson GXL and GXM USB2 PHY driver
18 /* bits [31:27] are read-only */
66 /* bits [31:14] are read-only */
112 ret = reset_control_reset(priv->reset); in phy_meson_gxl_usb2_init()
116 ret = clk_prepare_enable(priv->clk); in phy_meson_gxl_usb2_init()
118 reset_control_rearm(priv->reset); in phy_meson_gxl_usb2_init()
129 clk_disable_unprepare(priv->clk); in phy_meson_gxl_usb2_exit()
130 reset_control_rearm(priv->reset); in phy_meson_gxl_usb2_exit()
139 if (priv->is_enabled) { in phy_meson_gxl_usb2_reset()
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