Searched +full:mmc +full:- +full:host (Results 1 – 25 of 51) sorted by relevance
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| /Documentation/devicetree/bindings/mmc/ |
| D | ti-omap.txt | 1 * TI MMC host controller for OMAP1 and 2420
3 The MMC Host Controller on TI OMAP1 and 2420 family provides
4 an interface for MMC, SD, and SDIO types of memory cards.
7 by mmc.txt and the properties used by the omap mmc driver.
13 - compatible: Must be "ti,omap2420-mmc", for OMAP2420 controllers
14 - ti,hwmods: For 2420, must be "msdi<n>", where n is controller
19 msdi1: mmc@4809c000 {
20 compatible = "ti,omap2420-mmc";
25 dma-names = "tx", "rx";
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| D | mmc-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MMC Controller Common Properties
10 - Ulf Hansson <ulf.hansson@linaro.org>
13 These properties are common to multiple MMC host controllers. Any host
17 It is possible to assign a fixed index mmcN to an MMC host controller
23 pattern: "^mmc(@.*)?$"
25 "#address-cells":
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| D | bluefield-dw-mshc.txt | 2 Mobile Storage Host Controller
4 Read synopsys-dw-mshc.txt for more details
6 The Synopsys designware mobile storage host controller is used to interface
7 a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
9 by synopsys-dw-mshc.txt and the properties used by the Mellanox Bluefield SoC
10 specific extensions to the Synopsys Designware Mobile Storage Host Controller.
15 - "mellanox,bluefield-dw-mshc": for controllers with Mellanox Bluefield SoC
20 /* Mellanox Bluefield SoC MMC */
21 mmc@6008000 {
22 compatible = "mellanox,bluefield-dw-mshc";
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| D | mtk-sd.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mtk-sd.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MTK MSDC Storage Host Controller
10 - Chaotian Jing <chaotian.jing@mediatek.com>
11 - Wenbin Mei <wenbin.mei@mediatek.com>
16 - enum:
17 - mediatek,mt2701-mmc
18 - mediatek,mt2712-mmc
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| D | davinci_mmc.txt | 1 * TI Highspeed MMC host controller for DaVinci
3 The Highspeed MMC Host Controller on TI DaVinci family
4 provides an interface for MMC, SD and SDIO types of memory cards.
9 - compatible:
10 Should be "ti,da830-mmc": for da830, da850, dm365
11 Should be "ti,dm355-mmc": for dm355, dm644x
14 - bus-width: Number of data lines, can be <1>, <4>, or <8>, default <1>
15 - max-frequency: Maximum operating clock frequency, default 25MHz.
16 - dmas: List of DMA specifiers with the controller specific format
19 - dma-names: RX and TX DMA request names. These strings correspond
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| D | sdhci.txt | 1 The properties specific for SD host controllers. For properties shared by MMC
2 host controllers refer to the mmc[1] bindings.
4 [1] Documentation/devicetree/bindings/mmc/mmc.txt
7 - sdhci-caps-mask: The sdhci capabilities register is incorrect. This 64bit
10 turned off, before applying sdhci-caps.
11 - sdhci-caps: The sdhci capabilities register is incorrect. This 64bit
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| D | starfive,jh7110-mmc.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mmc/starfive,jh7110-mmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: StarFive Designware Mobile Storage Host Controller
10 StarFive uses the Synopsys designware mobile storage host controller
11 to interface a SoC with storage medium such as eMMC or SD/MMC cards.
14 - $ref: synopsys-dw-mshc-common.yaml#
17 - William Qiu <william.qiu@starfivetech.com>
21 const: starfive,jh7110-mmc
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| D | brcm,sdhci-brcmstb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/brcm,sdhci-brcmstb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Al Cooper <alcooperx@gmail.com>
11 - Florian Fainelli <f.fainelli@gmail.com>
16 - items:
17 - enum:
18 - brcm,bcm7216-sdhci
19 - const: brcm,bcm7445-sdhci
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| D | moxa,moxart-mmc.txt | 1 MOXA ART MMC Host Controller Interface
3 Inherits from mmc binding[1].
5 [1] Documentation/devicetree/bindings/mmc/mmc.txt
9 - compatible : Must be "moxa,moxart-mmc" or "faraday,ftsdc010"
10 - reg : Should contain registers location and length
11 - interrupts : Should contain the interrupt number
12 - clocks : Should contain phandle for the clock feeding the MMC controller
16 - dmas : Should contain two DMA channels, line request number must be 5 for
18 - dma-names : Must be "tx", "rx"
22 mmc: mmc@98e00000 {
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| D | ti-omap-hsmmc.txt | 1 * TI Highspeed MMC host controller for OMAP and 66AK2G family.
3 The Highspeed MMC Host Controller on TI OMAP and 66AK2G family
4 provides an interface for MMC, SD, and SDIO types of memory cards.
7 by mmc.txt and the properties used by the omap_hsmmc driver.
10 --------------------
11 - compatible:
12 Should be "ti,omap2-hsmmc", for OMAP2 controllers
13 Should be "ti,omap3-hsmmc", for OMAP3 controllers
14 Should be "ti,omap3-pre-es3-hsmmc" for OMAP3 controllers pre ES3.0
15 Should be "ti,omap4-hsmmc", for OMAP4 controllers
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| D | mmc-card.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-card.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MMC Card / eMMC Generic
10 - Ulf Hansson <ulf.hansson@linaro.org>
13 This documents describes the devicetree bindings for a mmc-host controller
14 child node describing a mmc-card / an eMMC.
18 const: mmc-card
23 broken-hpi:
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| D | cavium-mmc.txt | 1 * Cavium Octeon & ThunderX MMC controller
3 The highspeed MMC host controller on Caviums SoCs provides an interface
4 for MMC and SD types of memory cards.
10 - compatible : should be one of:
11 cavium,octeon-6130-mmc
12 cavium,octeon-7890-mmc
13 cavium,thunder-8190-mmc
14 cavium,thunder-8390-mmc
15 mmc-slot
16 - reg : mmc controller base registers
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| D | fsl-imx-mmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/fsl-imx-mmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale Secure Digital Host Controller for i.MX2/3 series
10 - Markus Pargmann <mpa@pengutronix.de>
13 - $ref: mmc-controller.yaml
18 - const: fsl,imx21-mmc
19 - const: fsl,imx31-mmc
20 - items:
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| D | socionext,uniphier-sd.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mmc/socionext,uniphier-sd.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Masahiro Yamada <yamada.masahiro@socionext.com>
16 - socionext,uniphier-sd-v2.91
17 - socionext,uniphier-sd-v3.1
18 - socionext,uniphier-sd-v3.1.1
32 dma-names:
33 const: rx-tx
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| D | amlogic,meson-mx-sdio.txt | 1 * Amlogic Meson6, Meson8 and Meson8b SDIO/MMC controller
3 The highspeed MMC host controller on Amlogic SoCs provides an interface
4 for MMC, SD, SDIO and SDHC types of memory cards.
13 - compatible : must be one of
14 - "amlogic,meson8-sdio"
15 - "amlogic,meson8b-sdio"
16 along with the generic "amlogic,meson-mx-sdio"
17 - reg : mmc controller base registers
18 - interrupts : mmc controller interrupt
19 - #address-cells : must be 1
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| D | amlogic,meson-gx-mmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/amlogic,meson-gx-mmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The MMC 5.1 compliant host controller on Amlogic provides the
14 - Neil Armstrong <neil.armstrong@linaro.org>
17 - $ref: mmc-controller.yaml#
22 - const: amlogic,meson-axg-mmc
23 - items:
24 - const: amlogic,meson-gx-mmc
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| D | mmc-pwrseq-emmc.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-pwrseq-emmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ulf Hansson <ulf.hansson@linaro.org>
15 performed just after MMC core enabled power to the given mmc host (to
25 const: mmc-pwrseq-emmc
27 reset-gpios:
36 - compatible
37 - reset-gpios
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| D | cdns,sdhci.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mmc/cdns,sdhci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cadence SD/SDIO/eMMC Host Controller (SD4HC)
10 - Masahiro Yamada <yamada.masahiro@socionext.com>
15 - enum:
16 - amd,pensando-elba-sd4hc
17 - microchip,mpfs-sd4hc
18 - socionext,uniphier-sd4hc
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| D | fsl,esdhc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale Enhanced Secure Digital Host Controller (eSDHC)
10 The Enhanced Secure Digital Host Controller provides an interface
11 for MMC, SD, and SDIO types of memory cards.
14 - Frank Li <Frank.Li@nxp.com>
19 - enum:
20 - fsl,mpc8536-esdhc
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| D | amlogic,meson-mx-sdhc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/amlogic,meson-mx-sdhc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - $ref: mmc-controller.yaml
13 - Martin Blumenstingl <martin.blumenstingl@googlemail.com>
16 The SDHC MMC host controller on Amlogic SoCs provides an eMMC and MMC
17 card interface with 1/4/8-bit bus width.
23 - enum:
24 - amlogic,meson8-sdhc
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| D | fujitsu,sdhci-fujitsu.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mmc/fujitsu,sdhci-fujitsu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
13 - $ref: mmc-controller.yaml#
18 - items:
19 - const: socionext,synquacer-sdhci
20 - const: fujitsu,mb86s70-sdhci-3.0
21 - enum:
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| D | sdhci-st.txt | 1 * STMicroelectronics sdhci-st MMC/SD controller
4 Documentation/devicetree/bindings/mmc/mmc.txt and the properties
5 used by the sdhci-st driver.
8 - compatible: Must be "st,sdhci" and it can be compatible to "st,sdhci-stih407"
9 to set the internal glue logic used for configuring the MMC
13 - clock-names: Should be "mmc" and "icn". (NB: The latter is not compulsory)
14 See: Documentation/devicetree/bindings/resource-names.txt
15 - clocks: Phandle to the clock.
16 See: Documentation/devicetree/bindings/clock/clock-bindings.txt
18 - interrupts: One mmc interrupt should be described here.
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| D | vt8500-sdmmc.txt | 1 * Wondermedia WM8505/WM8650 SD/MMC Host Controller
4 by mmc.txt and the properties used by the wmt-sdmmc driver.
7 - compatible: Should be "wm,wm8505-sdhc".
8 - interrupts: Two interrupts are required - regular irq and dma irq.
11 - sdon-inverted: SD_ON bit is inverted on the controller
16 compatible = "wm,wm8505-sdhc";
20 bus-width = <4>;
21 sdon-inverted;
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| D | rockchip-dw-mshc.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/rockchip-dw-mshc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip designware mobile storage host controller
10 Rockchip uses the Synopsys designware mobile storage host controller
11 to interface a SoC with storage medium such as eMMC or SD/MMC cards.
13 controller that are not already included in the synopsys-dw-mshc-common.yaml
17 - $ref: synopsys-dw-mshc-common.yaml#
20 - Heiko Stuebner <heiko@sntech.de>
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| /Documentation/driver-api/mmc/ |
| D | mmc-async-req.rst | 2 MMC Asynchronous Request
11 pre-fetch makes the cache overhead relatively significant. If the DMA
13 transfer, the DMA preparation overhead would not affect the MMC performance.
15 The intention of non-blocking (asynchronous) MMC requests is to minimize the
16 time between when an MMC request ends and another MMC request begins.
18 Using mmc_wait_for_req(), the MMC controller is idle while dma_map_sg and
19 dma_unmap_sg are processing. Using non-blocking MMC requests makes it
21 MMC request.
23 MMC block driver
26 The mmc_blk_issue_rw_rq() in the MMC block driver is made non-blocking.
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