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/Documentation/userspace-api/ioctl/
Dcdrom.rst5 - Edward A. Falk <efalk@google.com>
10 the CDROM layer. These are by-and-large implemented (as of Linux 2.6)
28 CDROMREADMODE2 Read CDROM mode 2 data (2336 Bytes)
30 CDROMREADMODE1 Read CDROM mode 1 data (2048 Bytes)
33 CDROMEJECT_SW enable(1)/disable(0) auto-ejecting
34 CDROMMULTISESSION Obtain the start-of-last-session
40 CDROMRESET hard-reset the drive
43 CDROMREADRAW read data in raw mode (2352 Bytes)
45 CDROMREADCOOKED read data in cooked mode
47 CDROMPLAYBLK scsi-cd only, (struct cdrom_blk)
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/Documentation/driver-api/serial/
Dserial-iso7816.rst11 2. Hardware-related considerations
14 Some CPUs/UARTs (e.g., Microchip AT91) contain a built-in mode capable of
17 For these microcontrollers, the Linux driver should be made capable of
19 available at user-level to allow switching from one mode to the other, and
29 Any driver for devices capable of working both as RS232 and ISO7816 should
35 4. Usage from user-level
38 From user-level, ISO7816 configuration can be get/set using the previous
57 /* Enable ISO7816 mode: */
Dserial-rs485.rst8 EIA-485, also known as TIA/EIA-485 or RS-485, is a standard defining the
15 2. Hardware-related Considerations
18 Some CPUs/UARTs (e.g., Atmel AT91 or 16C950 UART) contain a built-in
19 half-duplex mode capable of automatically controlling line direction by
21 half-duplex hardware like an RS485 transceiver or any RS232-connected
22 half-duplex devices like some modems.
24 For these microcontrollers, the Linux driver should be made capable of
26 available at user-level to allow switching from one mode to the other, and
37 [#DT-bindings]_. The serial core fills the struct serial_rs485 from the
41 Any driver for devices capable of working both as RS232 and RS485 should
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/Documentation/devicetree/bindings/usb/
Dusb-drd.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/usb/usb-drd.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Greg Kroah-Hartman <gregkh@linuxfoundation.org>
13 otg-rev:
16 which the device and its descriptors are compliant, in binary-coded
18 features (HNP/SRP/ADP) is enabled. If ADP is required, otg-rev should be
25 Tells Dual-Role USB controllers that we want to work on a particular
26 mode. In case this attribute isn't passed via DT, USB DRD controllers
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Dmediatek,mtk-xhci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/usb/mediatek,mtk-xhci.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 - $ref: usb-xhci.yaml
19 case 2: supports dual-role mode, and the host is based on xHCI driver.
25 - enum:
26 - mediatek,mt2701-xhci
27 - mediatek,mt2712-xhci
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/Documentation/driver-api/usb/
Dtypec.rst3 USB Type-C connector class
7 ------------
9 The typec class is meant for describing the USB Type-C ports in a system to the
14 The platforms are expected to register every USB Type-C port they have with the
15 class. In a normal case the registration will be done by a USB Type-C or PD PHY
18 considers the component registering the USB Type-C ports with the class as "port
23 driver is capable of supporting those features.
26 attributes are described in Documentation/ABI/testing/sysfs-class-typec.
29 --------------------
36 "port0-partner". Full path to the device would be
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/Documentation/arch/arm64/
Dasymmetric-32bit.rst2 Asymmetric 32-bit SoCs
7 This document describes the impact of asymmetric 32-bit SoCs on the
8 execution of 32-bit (``AArch32``) applications.
10 Date: 2021-05-17
16 of the CPUs are capable of executing 32-bit user applications. On such
19 ``execve(2)`` of 32-bit ELF binaries, with the latter returning
20 ``-ENOEXEC``. If the mismatch is detected during late onlining of a
21 64-bit-only CPU, then the onlining operation fails and the new CPU is
25 running legacy 32-bit binaries. Unsurprisingly, that doesn't work very
28 It seems inevitable that future SoCs will drop 32-bit support
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/Documentation/devicetree/bindings/serial/
Drs485.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
9 description: The RTS signal is capable of automatically controlling line
10 direction for the built-in half-duplex mode. The properties described
11 hereafter shall be given to a half-duplex capable UART node.
14 - Rob Herring <robh@kernel.org>
17 rs485-rts-delay:
18 description: prop-encoded-array <a b>
19 $ref: /schemas/types.yaml#/definitions/uint32-array
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/Documentation/userspace-api/media/v4l/
Dext-ctrls-detect.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _detect-controls:
10 or object detection capable devices.
13 .. _detect-control-id:
24 Sets the motion detection mode.
28 .. flat-table::
29 :header-rows: 0
30 :stub-columns: 0
32 * - ``V4L2_DETECT_MD_MODE_DISABLED``
33 - Disable motion detection.
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/Documentation/devicetree/bindings/phy/
Dmediatek,mt8365-csi-rx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/phy/mediatek,mt8365-csi-rx.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Mediatek Sensor Interface MIPI CSI CD-PHY
11 - Julien Stephan <jstephan@baylibre.com>
12 - Andy Hsieh <andy.hsieh@mediatek.com>
15 The SENINF CD-PHY is a set of CD-PHY connected to the SENINF CSI-2
17 Depending on the SoC model, each PHYs can be either CD-PHY or D-PHY only
18 capable.
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/Documentation/ABI/stable/
Dsysfs-bus-mhi28 a reset of last resort, and will require a complete re-init.
30 non-responsive, or as a means of loading new firmware as a
37 Description: Writing a non-zero value to this file will force devices to
38 enter EDL (Emergency Download) mode. This entry only exists for
39 devices capable of entering the EDL mode using the standard EDL
41 mode, the flash programmer image can be downloaded to the
/Documentation/devicetree/bindings/display/
Ddsi-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/dsi-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
26 reg-property set to the virtual channel number, usually there is just
33 clock-master:
42 "#address-cells":
45 "#size-cells":
49 "^panel@[0-3]$":
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/Documentation/networking/device_drivers/ethernet/3com/
D3c509.rst1 .. SPDX-License-Identifier: GPL-2.0
21 ethercards in Linux. These cards are commonly known by the most widely-used
22 card's 3Com model number, 3c509. They are all 10mb/s ISA-bus cards and shouldn't
23 be (but sometimes are) confused with the similarly-numbered PCI-bus "3c905"
28 - 3c509 (original ISA card)
29 - 3c509B (later revision of the ISA card; supports full-duplex)
30 - 3c589 (PCMCIA)
31 - 3c589B (later revision of the 3c589; supports full-duplex)
32 - 3c579 (EISA)
45 The driver allows boot- or load-time overriding of the card's detected IOADDR,
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/Documentation/devicetree/bindings/media/i2c/
Dthine,thp7312.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Paul Elder <paul.elder@@ideasonboard.com>
14 The THP7312 is a standalone ISP controlled over i2c, and is capable of
17 MIPI CSI-2 and parallel interfaces. It can also output on either MIPI CSI-2
18 or parallel. The hardware is capable of transmitting and receiving MIPI
23 - $ref: /schemas/media/video-interface-devices.yaml#
36 thine,boot-mode:
42 Boot mode of the THP7312, reflecting the value of the BOOT[0] pin strap.
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/Documentation/ABI/testing/
Dsysfs-devices-power31 For the devices that are not capable of generating system wakeup
40 space to control the run-time power management of the device.
61 with the main suspend/resume thread) during system-wide power
86 attribute is read-only. If the device is not capable to wake up
98 is read-only. If the device is not capable to wake up the
110 state in progress. This attribute is read-only. If the device
111 is not capable to wake up the system from sleep states, this
122 read-only. If the device is not capable to wake up the system
133 the device is being processed (1). This attribute is read-only.
134 If the device is not capable to wake up the system from sleep
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Ddebugfs-scmi17 command, advertised to have an higher-than-threshold execution
18 latency, should not be considered for atomic mode of operation,
35 SCMI instance <n> is capable of atomic mode of operation.
58 Description: Max number of concurrently allowed in-flight SCMI messages for
67 Description: Max number of concurrently allowed in-flight SCMI messages for
/Documentation/devicetree/bindings/display/panel/
Dnovatek,nt35950.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Novatek NT35950-based display panels
10 - AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
13 The nt35950 IC from Novatek is a Driver IC used to drive MIPI-DSI panels,
14 with Static RAM for content retention in command mode and also supports
15 video mode with VESA Frame Buffer Compression or Display Stream Compression
17 This DDIC is also capable of upscaling an input image to the panel's native
22 - $ref: panel-common-dual.yaml#
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/Documentation/devicetree/bindings/net/
Dti,icssg-prueth.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/ti,icssg-prueth.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Md Danish Anwar <danishanwar@ti.com>
13 Ethernet based on the Programmable Real-Time Unit and Industrial
19 - ti,am642-icssg-prueth # for AM64x SoC family
20 - ti,am654-icssg-prueth # for AM65x SoC family
21 - ti,am654-sr1-icssg-prueth # for AM65x SoC family, SR1.0
32 dma-names:
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Dkeystone-netcp.txt6 switch sub-module to send and receive packets. NetCP also includes a packet
10 capable of performing IPSec operations on ingress/egress packets.
13 includes a 3-port Ethernet switch sub-module capable of 10Gb/s and 1Gb/s rates
16 Keystone NetCP driver has a plug-in module architecture where each of the NetCP
17 sub-modules exist as a loadable kernel module which plug in to the netcp core.
18 These sub-modules are represented as "netcp-devices" in the dts bindings. It is
19 mandatory to have the ethernet switch sub-module for the ethernet interface to
20 be operational. Any other sub-module like the PA is optional.
24 -----------------------------
26 -----------------------------
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/Documentation/admin-guide/hw-vuln/
Dcross-thread-rsb.rst2 .. SPDX-License-Identifier: GPL-2.0
4 Cross-Thread Return Address Predictions
7 Certain AMD and Hygon processors are subject to a cross-thread return address
8 predictions vulnerability. When running in SMT mode and one sibling thread
14 thread. However, KVM does allow a VMM to prevent exiting guest mode when
15 transitioning out of C0. This could result in a guest-controlled return target
19 -------------------
23 - AMD Family 17h processors
24 - Hygon Family 18h processors
27 ------------
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/Documentation/infiniband/
Dipoib.rst37 connected. The mode is set and read through an interface's
38 /sys/class/net/<intf name>/mode file.
40 In datagram mode, the IB UD (Unreliable Datagram) transport is used
43 fabric with a 2K MTU, the IPoIB MTU will be 2048 - 4 = 2044 bytes.
45 In connected mode, the IB RC (Reliable Connected) transport is used.
46 Connected mode takes advantage of the connected nature of the IB
52 In connected mode, the interface's UD QP is still used for multicast
53 and communication with peers that don't support connected mode. In
66 checksum offload capable devices.
68 Stateless offloads are supported only in datagram mode.
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/Documentation/devicetree/bindings/pci/
Dbrcm,stb-pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/brcm,stb-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jim Quinlan <james.quinlan@broadcom.com>
15 - enum:
16 - brcm,bcm2711-pcie # The Raspberry Pi 4
17 - brcm,bcm4908-pcie
18 - brcm,bcm7211-pcie # Broadcom STB version of RPi4
19 - brcm,bcm7216-pcie # Broadcom 7216 Arm
[all …]
/Documentation/networking/
Dphy.rst26 #. Increase code-reuse
27 #. Increase overall code-maintainability
67 for one of the users. (e.g. "git grep fsl,.*-mdio arch/powerpc/boot/dts/")
72 The Reduced Gigabit Medium Independent Interface (RGMII) is a 12-pin
83 internal delay by itself, it assumes that either the Ethernet MAC (if capable)
84 or the PCB traces insert the correct 1.5-2ns delay
97 * PHY devices may offer sub-nanosecond granularity in how they allow a
109 For cases where the PHY is not capable of providing this delay, but the
110 Ethernet MAC driver is capable of doing so, the correct phy_interface_t value
114 MAC driver looks at the phy_interface_t value, for any other mode but
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/Documentation/devicetree/bindings/iio/dac/
Dadi,ltc2688.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Nuno Sá <nuno.sa@analog.com>
13 Analog Devices LTC2688 16 channel, 16 bit, +-15V DAC
14 https://www.analog.com/media/en/technical-documentation/data-sheets/ltc2688.pdf
19 - adi,ltc2688
24 vcc-supply:
27 iovcc-supply:
30 vref-supply:
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/Documentation/devicetree/bindings/dma/stm32/
Dst,stm32-mdma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/stm32/st,stm32-mdma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The STM32 MDMA is a general-purpose direct memory access controller capable of
13 described in the dma.txt file, using a five-cell specifier for each channel:
22 -bit 0-1: Source increment mode
26 -bit 2-3: Destination increment mode
30 -bit 8-9: Source increment offset size
32 0x1: half-word (16bit)
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